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Using EMC Software Tools for Real World Printed Circuit Board Designs

Software tools can give the EMC engineer a better chance to pass EMC requirements the first time. Unfortunately, engineers often tell me that they don’t have time to learn tools because they are too busy in the lab doing debug work on a failing product.

This reminds me of a story a good friend told me years ago. A woodsman with an axe is trying to clear an acre of forest, when a salesman comes with a “new” product that can help. However, the woodsman tells the salesman that he has no time to learn about the new tool called a chain saw because he is too busy.

Sometimes, you have to make time to save time!

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There are a number of tools available at different levels. We often hear about full wave simulation tools and see the impressive types of plots they can generate. These are valuable tools, but require a good working knowledge of electromagnetics as well as the simulation technique the tool uses. In the hands of an expert user, these tools can greatly improve the overall understanding of the physics involved. However, they take time and expertise, and usually are not appropriate during the design phase, and certainly do not help predict pass/fall of the product. There is too much interaction for these tools to be used as a prediction of pass/fall. These tools can be invaluable to help before the design process to develop design guidelines, etc.

Another level tool is the PCB automated rule checking software. As with the full wave tools, this level software is available from a number of different vendors. This tool can easily fit into the design process and quickly identify potential design issues to be considered by the EMC engineer. Most vendor tools have convenient output views that focus on the rule violation so the engineer can quickly see the rule violation and decide if it must be corrected or not.

Unfortunate Typical Design Process

Often a typical design process takes the following steps:

  1. A design engineer passes a number of EMC design rules on to the PCB physical layout engineer;
  2. The rules are mostly ignored because they’re too hard, time consuming, or inconvenient;
  3. The product is built, tested in the EMC lab and fails;
  4. EMC engineers spend days/weeks to find a fix for the problem;
  5. Then, the PCB must be re-designed with the changes;
  6. Finally (we hope!), the product is again built, tested, and passes (or the cycle is repeated).

This sounds awful and it is! It delays time to market, and often increases product cost because of band aid fixes applied late in the design process. However, when I talk to many EMC engineers they agree (sadly) that this process is more typical then they wish it was!  Using PCB EMC rule checking tools could definitely help turn this process around, making it more typical to pass EMC testing the first time.

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Before the Design Begins

As I mentioned earlier, full wave tools, when used by a knowledgeable engineer, can help define the “grey” areas between extremes and help refine the design rules to be used. If such tools or users are not available, then training classes, published articles, etc. can be a big help in identifying which rules apply to your product set. Beware of a simple list of do’s and don’ts; they may or may not apply to your product. It is important to understand why a rule exists, so trade-offs can be made when necessary. Any so-called EMC expert or book that does not explain why something is important should be avoided!

Once the Design Begins

The EMC engineer should have a set of appropriate design rules for the product type, and should work closely with the PCB physical layout engineer to help make design trade-offs when needed. Many of the automated design rule checking tools can run on partially designed boards to help along the way. Of course, they should also be run against the full PCB design. There are usually some rule violations, and the EMC engineer can work with the layout engineer to identify which violations are important and which will be difficult to change.

After the Design Process

A review of the EMC testing results can help validate the EMC rules and limits, or modify if necessary. Also, a review can help show the design engineers why certain EMC rules are important for future designs.

Using PCB EMC Rule Checking Tools

Once the native CAD design files are imported into the tool, there are a few steps to get started before running the actual rule checking with these tools. First, the EMC engineer needs to “tag” or identify which nets and components are most important to EMC performance.

Critical nets are typically ones used for clock signals, fast rise time or data rate data signals, etc. Critical components might be decoupling capacitors, filter components, termination resistors, etc. Most of the available software tools have some ability to make this easy by grouping buss lines, identifying decoupling capacitors (connected between power and ground-reference), and other conveniences.

Figure 1 shows an example of a screen shot summarizing the tagging results. Once the nets and components are tagged, future tagging efforts can be even easier if the net naming convention is consistent from board to board within a company.

Figure 1: Example of automated tagging summary (All figures courtesy of CST)
Figure 1: Example of automated tagging summary (All figures courtesy of CST)

 

The second step is to choose which EMC rules to check. Not all rules apply to all boards. Most vendor tools will help with some default rules and limits, and these can be modified as desired. Rules generally fall in to the following categories:  reference plane interruptions, wiring and crosstalk (for example, between a clock net and an I/O net), decoupling power planes and traces, and placement of components
(such as filters, etc.).

Figure 2 shows an example of the various rules and one of the rule’s options and limits.

Figure 2: Example of Rule Selection and Options/Limits
Figure 2: Example of Rule Selection and Options/Limits

 

Once the components and traces are tagged and the rules set, the tool then goes to work. Depending on the complexity of the board, number of layers, nets, etc., this could take a few minutes to many minutes. Very seldom does the actual rule checking take a long time.

Once the rule checking is completed, the results are usually available in a couple of formats. Typically, some sort of listing of rule violations and how much the rule limits were missed can be displayed. However, visual inspection is typically much faster, so rule violation viewing can be very helpful.

Figure 3 shows an example of a trace that crosses a void in the nearest reference plane. You can see that the PCB layers that are involved in this violation are visible, but other layers are not visible, making the violation clear. Many tools will also zoom to the violation and even highlight the net involved (in this example) and add features to help focus the users eyes on the violation.

Figure 3: Example of Violation Viewing for Trace crossing void in reference plane
Figure 3: Example of Violation Viewing for Trace crossing void in reference plane

 

Figure 4 shows an example of a violation where the trace is routed too close to the edge of the PCB ground-reference.

Figure 4: Example of Violation Viewing for Trace too close to edge of reference plane
Figure 4: Example of Violation Viewing for Trace too close to edge of reference plane

 

Summary

Software tools exist at various levels to help the EMC engineer increase the likelihood of passing EMC requirements the first time. When used correctly, full wave tools can help fill in the grey areas. Even more useful for PCB design are automated rule checking tools. While these tools do not replace the need for some level of EMC understanding and knowledge, rule check tools can very quickly identify potential trouble locations and can be easily integrated into the typical design process.

Remember the woodsman and the chainsaw? Which way seems best to you?

author_archambeault-bruceDr. Bruce Archambeault is an IEEE Fellow, an IBM Distinguished Engineer Emeritus and an Adjunct Professor at Missouri University of Science and Technology. He received his B.S.E.E degree from the University of New Hampshire in 1977 and his M.S.E.E degree from Northeastern University in 1981. He received his Ph. D. from the University of New Hampshire in 1997. His doctoral research was in the area of computational electromagnetics applied to real-world EMC problems. He has taught numerous seminars on EMC and Signal Integrity across the USA and the world, including the past 15 years at Oxford University.

 Dr. Archambeault has authored or co-authored a number of papers in computational electromagnetics, mostly applied to real-world EMC applications. He is a member of the Board of Directors for the IEEE EMC Society and a past Board of Directors member for the Applied Computational Electromagnetics Society (ACES). He currently serves as the Vice president for Conferences of the EMC Society. He has served as a past IEEE/EMCS Distinguished Lecturer, EMCS TAC Chair and Associate Editor for the IEEE Transactions on Electromagnetic Compatibility. He is the author of the book “PCB Design for Real-World EMI Control” and the lead author of the book titled “EMI/EMC Computational Modeling Handbook”. He can be reached at bruce@brucearch.com.

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