Hot Topics in ESD

How is automated handling equipment treated under an S20.20 compliant ESD program?

Circuit design reliability verification in Integrated Circuit (IC) design is extremely challenging.

How can we provide a quantitative measure of ESD robustness but control the rising test times while preventing major overstress and wear out from thousands of ESD strikes per IC?

The charged device model describes the electrostatic discharge (ESD) event that occurs when an integrated circuit (IC) is rapidly charged or discharged through a single pin to a metallic surface.

Transmission Line Pulse testing is the default method for characterizing the behavior of devices under ESD circumstances.