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Military and Aerospace EMC: Grounds and Returns

Patrick André discusses the misconception of "ground" in electrical engineering. He explains the difference between true ground and power/signal returns, emphasizing the importance of proper return line treatment in circuit design. André highlights how this understanding impacts EMC performance and system design across various applications.

FDA Releases Paper on Health Equity for Medical Devices

As part of a broader effort to expand health outcomes across diverse populations in the U.S., the U.S. Food and Drug Administration (FDA) has published a Discussion Paper to facilitate a public discussion on how to advance health equity in connection with medical devices.

FCC Seeks Comments on Proposed Rules for 3.55-3.7 GHz Band Operations

The U.S. Federal Communications Commission is seeking comment on a wide range of changes to its rules applicable to frequency bands used by the Citizens Broadband Radio Service.

Evaluating the Latest Strategies for Electrostatic Hazard Mitigation in Medical Environments

This article discusses the risks of electrostatic discharge (ESD) in healthcare settings and the new ESDA TR29 guidance document. It outlines causes of ESD, potential hazards like equipment malfunction and data loss, and preventive measures such as static control flooring, proper grounding, and humidity control. The article also describes recommended ESD control programs for healthcare facilities.

Filter Designs for Switched Power Converters − Part 1: Overview

This series of articles delves into the design principles of power filters for switched-mode power converters and similar applications, focusing on conducted and radiated emissions. Part 1 provides an overview of filter design principles, emphasizing the need for specialized approaches to meet EMC specifications in an increasingly electrified and sustainable world.
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Advanced CDM Simulation Methodology for High-Speed Interface Design

A Charged Device Model (CDM) simulation method has been demonstrated to predict CDM fail current of receiving circuits with gate oxide connected to pad. This method involves inclusion of 20ps rise time edge into the stimulus. It was shown previously that this fast rise time component of the pulse can cause the gate oxide damage. The simulation method is intended as a schematic-level tool during pre-silicon design phase to deliver CDM ESD protection. Simulation results are verified by silicon results with qualification CDM test on package and Transmission-Line-Pulse (TLP) measurements on wafer-level.

Smith Chart and Voltage Standing Wave Ratio

This article explains how to use a Smith Chart to determine the voltage standing wave ratio (VSWR).

What’s New in ESD Control Standards?

Standards continuously evolve, and EOS/ESD Association, Inc. standards are no different. The ESDA is always striving to achieve the highest quality standards.

How to Measure Spacings on a Printed Circuit Board to Ensure Safety

This blog by Don MacArthur discusses how to measure creepage and clearance distances on printed circuit boards (PCBs) to ensure safety. It covers definitions, design guidelines, measurement techniques, and tips for compliance engineering in electrical product safety.

NY High School Helps Train Next-Gen Amateur Radio Operators

On a bright note, a teacher at a high school in Staten Island, NY is helping to train the next generation of America’s amateur radio operators!
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