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The verification of electrostatic discharge (ESD) protection in a complex integrated circuit (IC) design is extremely challenging. Leading-edge designs have many supply domains and voltage levels for different functional parts like radio frequency (RF), digital and high voltage blocks, making ESD checking a complex and error prone task. Relying on manual verification alone poses a significant risk of missing design flaws, which can be very costly during manufacturing and in the field. Consequently, automated ESD checking is highly desired in today’s design flow. This article outlines the essential requirements of the ESD verification flow as defined by the ESD Association (ESDA) Electronic Design Automation (EDA) Tool Working Group [1].

Thermal testing, also known as heat testing, is one of the most critical tests required by the majority of regulatory safety standards in determining the safety of a product.
Excessive heat is the number one enemy in any electrical or electronic circuit. Designers are perpetually trying to improve the way to reduce heat or partially cool their products because they are being asked to design products with higher power density into smaller sizes, while operating temperatures of components or devices have not changed greatly over the past few decades. This means that component temperatures must be well controlled to avoid any failure and to increase the reliability of the product.

A method of determining the performance of an open area test site (OATS) or an anechoic chamber is to perform a site attenuation measurement. The process used is to step a signal source at the transmitting antenna and use a receiver or spectrum analyzer at the receiving antenna. The two are stepped together to give a set of data that shows the performance of the test site or chamber. ANSI C63.4 outlines the process for performing normalized site attenuation (NSA) measurements. In these measurements, the spectrum analyzer controls the signal source.