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Eye Diagram

This article addresses the impact of driver, HDMI cable, and receiver on signal quality using data eye, based on the following criteria: data eye opening, data mask violation, and data jitter.

Industry Council’s Latch‑up Survey

This article provides a high-level overview of the Industry Council paper “Survey on Latch‑up Testing Practices and Recommendations for Improvements,” which describes the full analysis of the collected responses and lays a path for potential adaptations needed to accommodate its use in future technologies and applications.

Banana Skins – August 2022 (#394-396)

Because of their mobility, vehicles will be placed in many different kinds of Electromagnetic environments.

Use of Ferrites in PCB Reference Planes

Should the reference (i.e., ground) plane be split into two separate sections and a ferrite bead installed between them to prevent unwanted radio frequency emissions? Let’s examine why this practice is not a good idea and should be avoided at all costs.

Eye Diagram

This is the first of two articles devoted to an eye diagram. In this article, the fundamental definitions and concepts are presented.
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Challenges of Designing System-Level ESD Protection at the IC-Level

There is often confusion about the interaction between IC-level component ESD protection and the appropriately required system-level ESD protection strategy.

Cable Antennas and Ferrite Cores

In this column, the author offers a brief summary of a more systematic approach for using ferrite cores on cables. This summary can serve as a “ferrite core checklist” for design and test engineers.

Proper Heatsink Grounding

A common question in new product development is, “How do I properly ground the heatsink?” As a practicing compliance professional, this is an important question to have at least an idea of how to respond.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This month’s column is the last of three parts devoted to designing, testing, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Latch-up Electronic Design Automation Checks

This article introduces typical latch-up verification techniques to detect and prevent latch-up. These techniques rely on electronic design automation (EDA) tools to deliver the coverage necessary to identify and eliminate latch-up risks. 
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