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Shielding to Prevent Radiation, Part 2

This is the second of seven articles devoted to the topic of shielding to prevent electromagnetic wave radiation. This article discusses the normal incidence of a uniform plane wave on a solid conducting shield with no apertures.

Addressing an Industry Concern: The Demand for a CDM Bare Die Testing Method

Traditional Charged Device Model testing falls short for bare dies in 2.5D/3D devices. With discharge currents reaching 500 mA at just 5V, existing methods can't handle the unique challenges of testing unpackaged components. CCTLP emerges as a promising alternative for reliable low-voltage testing.

Shielding to Prevent Radiation, Part 1

This is the first of seven articles devoted to the topic of shielding to prevent electromagnetic wave radiation. The results presented here are valid under the assumption of a uniform plane wave with normal (perpendicular) incidence on a boundary between two media.

Why ESD Electronic Design Automation Checks are So Critical: Part 2

A new version of Technical Report TR18.0-01-25 (TR18) on ESD Electronic Design Automation (EDA) Checks by the ESD Association’s Working Group 18 is about to be released. This article, divided into Part 1 and Part 2, provides guidelines for the EDA industry and the ESD design community for establishing a comprehensive ESD verification flow to address the ESD design challenges of modern ICs.

Inductor Impedance Evaluation from S-Parameter Measurements: Part 2

This column examines inductor impedance evaluation using S21 parameters with network analyzers. Comparing two-port shunt and series methods across multiple inductors, it concludes that the two-port series method provides significantly more accurate measurements when compared with manufacturer data.
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Why ESD Electronic Design Automation Checks are So Critical: Part 1

This article introduces an upcoming Technical Report (TR18) from the ESD Association on Electronic Design Automation checks. It details integrated ESD verification throughout IC design phases, covering schematic-based topological checks and layout-based verification to ensure comprehensive ESD protection in modern circuits.

Poor Power Distribution Network Leads to Unexpected Radiated Emissions

This article explores a radiated emissions case where unexpected high-frequency noise appeared on low-speed I/O lines. The author discusses how power distribution network design issues can cause emissions problems and shares strategies for improving EMC performance through proper PCB layout.

ANSI Z535.7 – Product Safety Information in Electronic Media in Focus

This article introduces ANSI Z535.7, a new standard released in late 2024 addressing product safety information in electronic media. It complements existing ANSI standards by providing guidelines for digital formats, helping manufacturers create consistent safety messaging across both physical and electronic platforms.

Inductor Impedance Evaluation from S-Parameter Measurements: Part 1

This first installment in a two-part series evaluates inductor impedance using S11 parameters across one-port shunt, two-port shunt, and two-port series methodologies. Experimental results reveal significant discrepancies between measured values and manufacturer specifications, highlighting limitations in S11-based impedance characterization techniques.

AC and DC Ionization, the Whole Story

The teaser maintains a technical, authoritative tone that should appeal to engineering professionals while highlighting the article's key experimental findings. It addresses the misconceptions about AC ionizer safety and emphasizes the quantitative approach taken in the study, which should generate interest among readers concerned with ESD protection in semiconductor manufacturing environments.
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