This is the first of three articles devoted to the design, test, and electromagnetic compatibility (EMC) immunity evaluation of multilayer PCBs containing analog circuitry. In this study, there are seven design variants that all contain a similar schematic but implement different PCB layout techniques.
Most ESD experts consider CDM testing to be the most critical ESD qualification test for modern integrated circuits. ESD control engineers need to know the charged device ESD robustness of all components passing through their manufacturing line. CDM measurements provide that knowledge.
This article presents a simple method of estimating the parasitics of the three passive circuit components (R, L, C).
The thin-film transistor (TFT) became commercially available slightly more than 30 years ago in the form of a switch for the Liquid Crystal Display.
Read an interview with Dr. Robinson for context on manuals, including the latest standards and best practices for incorporation with your product safety strategy.
This is the 10th and the final article in a series of articles devoted to the design, test, and EMC emissions evaluation of 1- and 2-layer PCBs that contain AC/DC and/or DC/DC converters and employ different ground techniques.
This is the second of a two-part series on transmission line pulse (TLP) testing.
Is it safe to use cellphones on airplanes? The real question should be: “Is it safe for passengers to use any electronic equipment on airplanes?”
This article offers details on some of the major power-saving measures for LTE-based CIoT implementations currently recommended by the 3rd Generation Partnership Project (3GPP).
We continue to focus on the AC/DC power converter board (2-layer PCB). We evaluate the implementation of several EMC countermeasures and present the conducted and radiated emissions results performed according to the CFR Title 47, Part 15, Subpart B, Class B.