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Printed Circuit Boards

Local PCB Layout Tweaks for Improved Signal Integrity When Using ESD Protection Devices

This article describes a practical way to improve signal integrity of typical interfaces on the PCB when using external ESD devices.

Return-Current Distribution in a PCB Microstrip Line Configuration, Part 2

This is the second article of a two-article series devoted to the return current distribution in a PCB microstrip line configuration.

Return-Current Distribution in a PCB Microstrip Line Configuration, Part 1

This is the first article of a two-article series devoted to the return current distribution in a 2-layer FR-4 PCB microstrip line configuration with a solid reference plane.

Troubleshooting EMI Issues Caused by Structural Resonances

Most EMI issues are caused by a resonance that is excited somewhere in the system. It may be a resonance of a cable acting as an antenna or a heatsink energized by the power electronics switches bolted to it, becoming a good radiator. In this article, we look at the indicators that signal the presence of structural resonances and provide techniques for fixing the EMI issues. Practical case studies are presented to demonstrate the techniques.

Most Important PCB Layer Stack-up Considerations That Achieve Optimal EMC Performance

There are many books and other reference materials available that describe proper printed circuit...
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Use of Ferrites in PCB Reference Planes

Should the reference (i.e., ground) plane be split into two separate sections and a ferrite bead installed between them to prevent unwanted radio frequency emissions? Let’s examine why this practice is not a good idea and should be avoided at all costs.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This month’s column is the last of three parts devoted to designing, testing, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This is the second of three articles devoted to the design, test, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity Using a Multilayer PCB

This is the first of three articles devoted to the design, test, and electromagnetic compatibility (EMC) immunity evaluation of multilayer PCBs containing analog circuitry. In this study, there are seven design variants that all contain a similar schematic but implement different PCB layout techniques.

Evaluation of EMC Emissions and Ground Techniques on 1- and 2-layer PCBs with Power Converters

This is the 10th and the final article in a series of articles devoted to the design, test, and EMC emissions evaluation of 1- and 2-layer PCBs that contain AC/DC and/or DC/DC converters and employ different ground techniques.
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