Design

A case study describing the influence of TFT LCD graphics on automotive radiated emissions testing and its impact to the FM band receiver. The underlying root-cause of the EMI issue is determined using a novel technique that decodes the display’s graphics into the transmitted RGB data and predicts the data’s impact to radiated emissions. The countermeasure implemented to resolve the issue is equally novel and does not involve any hardware optimizations. The use of test images to be used in component level EMC testing is also discussed.

Electromagnetic interference (EMI) filters are often used on automotive 13.8 VDC power networks to reduce high-frequency noise from being conducted off the printed circuit boards (PCB) and resulting into EMI problems. The filter performance is difficult to predict and often compromised at high frequencies due to parasitics associated with the filter itself, or the PCB layout. The power line filters with Surface Mount Technology ferrite and Multi Layer Ceramic Capacitors are attractive solutions for mitigation of RF noise in high-density automotive PCBs. A lumped-element SPICE model is introduced for optimized π-filter design, including frequency-dependent ferrite component model. The PCB implementation of EMI filter is outlined for optimum filter performance.

Military EMC design can be particularly vexing. Multiple environments combined with multiple threats lead to multiple requirements. The threat levels, and the resulting requirements, are usually more stringent than found in the commercial world.

A worldwide epidemic of counterfeit electronic components is flooding the market and affects the supply chains of all industries. It is estimated that the financial loss due to counterfeit components is over $10 billion per year. Counterfeiting itself becomes profitable when scrapped components, components from recycled products or inexpensive components can be “remarked” and sold as a new, more expensive, higher reliability version. Much of the effort today has not been placed on preventing counterfeiting but rather screening components to identify and remove counterfeits before they are used in a finished product.

Many sources recently have reported that electrical failures to components previously classified as EOS (Electrical Overstress) are instead the result of ESD (Electrostatic Discharge) failures due to charged-board events (CBE) [1,2]. A charged printed circuit board assembly stores substantially more charge than a discrete device as its capacitance is larger. A subsequent discharge of the board assembly results in increased current for that event - versus that of the discrete component. Consequently, a device’s CDM (charged device model) rating is lowered when mounted in a printed circuit board (PCB). In an attempt to get a feel for just how much it is lowered, we conducted CDM stress tests on components in discrete form, and again after insertion into larger and larger sized pc boards. We found that the CDM ratings are lowered dramatically!

Asurion of Smyrna, TN has recalled about 470,000 counterfeit Blackberry-brand cell phone batteries, distributed in refurbished Blackberry-branded devices.

Each year the IEEE Electromagnetic Compatibility Society sponsors a Best Student Paper competition as part of the IEEE International Symposium on EMC.  The contest is administered by the Educational and Student Activities Committee (ESAC) of the Society.  For the 2010 Symposium 33 student papers were submitted, the largest number in recent memory.  An ESAC panel reviewed and ranked the submissions based on technical contribution, accuracy, and clarity.  It always proves to be a challenge to select a single winner from the many fine papers covering many diverse aspects of EMC that are received.  The paper selected for 2010 use modal decomposition to derive a transmission line model for printed circuit board vias that can be implemented in circuit simulators.  The new model has a significantly faster computation time than that of a full-wave simulator while giving results that are in good agreement.  The practical benefit is an improved facility for of the design and optimization of high speed digital circuit boards for both signal integrity and EMC compliance.