Electronic products are designed and tested to a variety of EMC requirements. Although specific requirements and test methods can vary by industry, ESD, transient immunity, RF immunity and RF emissions are evaluated for most products – certainly for all products that require a CE Mark.
The verification of electrostatic discharge (ESD) protection in a complex integrated circuit (IC) design is extremely challenging. Leading-edge designs have many supply domains and voltage levels for different functional parts like radio frequency (RF), digital and high voltage blocks, making ESD checking a complex and error prone task. Relying on manual verification alone poses a significant risk of missing design flaws, which can be very costly during manufacturing and in the field. Consequently, automated ESD checking is highly desired in today’s design flow. This article outlines the essential requirements of the ESD verification flow as defined by the ESD Association (ESDA) Electronic Design Automation (EDA) Tool Working Group .
A method of determining the performance of an open area test site (OATS) or an anechoic chamber is to perform a site attenuation measurement. The process used is to step a signal source at the transmitting antenna and use a receiver or spectrum analyzer at the receiving antenna. The two are stepped together to give a set of data that shows the performance of the test site or chamber. ANSI C63.4 outlines the process for performing normalized site attenuation (NSA) measurements. In these measurements, the spectrum analyzer controls the signal source.