signal integrity

Impact of PCB Via and Trace Geometry on the Effectiveness of Decoupling Capacitors, Part 3

Via placement and trace geometry significantly affect decoupling capacitor performance. This final installment of a three-part series presents conducted emissions measurements across six PCB via topologies, revealing how distance from the power-ground plane pair and via spacing impact EMC results.

Influence of PCB Layout on S-Parameter Measurements of High-Speed ESD Protection Devices

Discover how PCB layout choices can dramatically alter S‑parameter measurements of high‑speed ESD protection devices—especially in the femtofarad range. Through 3D EM simulations and real‑world testing, this article reveals why accurate modeling and optimized test boards are essential for reliable high‑speed performance.

Identifying Coupling in Real World Systems

When your circuit misbehaves with unexplained noise and jitter, you're facing electromagnetic coupling. This practical guide walks engineers through identifying whether problems stem from differential or common mode issues, near-field or far-field effects, and provides a systematic debugging workflow to isolate sources, paths, and receivers—getting your design back on track.

Case Studies and Real-World Applications of EMI Filters

By understanding the real-world applications and significance of EMI filters, engineers can design and implement effective solutions to manage electromagnetic interference across various industries, ensuring the smooth operation and compliance of electronic systems.

Impact of Decoupling Capacitors and Trace Length on Conducted Emissions in a CMOS Inverter Circuit

The authors evaluate the impact of capacitors and trace length on conducted emissions.
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Impact of a Decoupling Capacitor and Trace Length on Signal Integrity in a CMOS Inverter Circuit

This article describes a laboratory experiment that shows the impact of the decoupling capacitors and a PCB trace length on the signal integrity in a CMOS inverter circuit.

Local PCB Layout Tweaks for Improved Signal Integrity When Using ESD Protection Devices

This article describes a practical way to improve signal integrity of typical interfaces on the PCB when using external ESD devices.

Signal Integrity Versus EMC

This article addresses two very common questions involving two interrelated and specialized sub-fields within the realm of compliance engineering.

Post-layout Signal Integrity/Power Integrity Simulation Software Expectations

Discover the most important post-layout elements when selecting a SI/PI software simulation package.

Pre-layout Signal Integrity/Power Integrity Simulation Software Expectations

This article briefly describes the most important pre-layout elements to look for when selecting a SI/PI software simulation package.
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