Robert Gauthier

Overall, latch-up prevention is one of the most important tasks for both foundries and IC designers. Based on the chip design scheme, designers should select proper solutions to eliminate the ILU and ELU risks in chip design, referencing the foundry guidelines and latch-up silicon data to ensure minimal latch-up risks for the product. 

Can you continue aiming for typical CDM protection levels? Introduction The ESD Design Window (ESD-DW) has...