Robert Ashton

In earlier articles in this publication we have discussed the charged device model (CDM) testing of small devices. In the first article we demonstrated that the peak current for small devices does not become vanishingly small.¹ The commonly held belief of vanishing current for small devices was shown to be an artifact of measuring the current with the 1 GHz oscilloscope² specified in the JEDEC CDM standard.⁶ The second article explained various ways to make CDM testing of small devices more reliable with the use of small surrogate packages, or the use of templates to hold the device during testing.³ In this article we will show how insight can be gained into the CDM testing of small devices using a simple three capacitor circuit model.^{4, 5}

Integrated circuits are classified for ESD robustness using a variety of tests. The most popular tests are Human Body Model (HBM) and Charged Device Model (CDM). These two ESD classifications are intended to indicate how well a circuit will survive ESD stresses in manufacturing environments which include basic ESD controls. HBM is the oldest of the ESD tests, but factory ESD control experts generally agree that CDM is the more important test in modern, highly automated, assembly operations. The amount of stress for CDM scales with the size of the device. For that reason “conventional wisdom” on CDM has often stated that you don’t need to test very small integrated circuits because the peak currents get vanishingly small. In last month’s article for IN Compliance [1] we presented an article showing that the peak current for very small devices does not become vanishingly small as often thought. Measurements with a high speed oscilloscope demonstrated that peak currents remain surprisingly high even for very small devices although the width of the pulse gets very narrow. In the past these high peak currents were missed due to the use of 1 GHz oscilloscopes as called for in the standard for the field induced CDM test [2], the most popular form of CDM testing.