printed circuit boards

The board stackup is probably the most essential piece for ensuring a successful PCB design. Modern high-speed busses require controlled-impedance traces, and whether you are using a simulation tool, a simple calculator, or the back of a napkin, you need to understand your manufacturing process to correlate your impedance calculations. This ensures that your trace widths and dielectric heights match what will actually be manufactured, and eliminates last-minute design changes.

There may be a better use for PCB planes than to just distribute power, namely to provide shielding.

Many sources recently have reported that electrical failures to components previously classified as EOS (Electrical Overstress) are instead the result of ESD (Electrostatic Discharge) failures due to charged-board events (CBE) [1,2]. A charged printed circuit board assembly stores substantially more charge than a discrete device as its capacitance is larger. A subsequent discharge of the board assembly results in increased current for that event - versus that of the discrete component. Consequently, a device’s CDM (charged device model) rating is lowered when mounted in a printed circuit board (PCB). In an attempt to get a feel for just how much it is lowered, we conducted CDM stress tests on components in discrete form, and again after insertion into larger and larger sized pc boards. We found that the CDM ratings are lowered dramatically!