Equivalent Transmission-Line Model for Vias Connected to Striplines in Multilayer Print Circuit Boards

Each year the IEEE Electromagnetic Compatibility Society sponsors a Best Student Paper competition as part of the IEEE International Symposium on EMC.  The contest is administered by the Educational and Student Activities Committee (ESAC) of the Society.  For the 2010 Symposium 33 student papers were submitted, the largest number in recent memory.  An ESAC panel reviewed and ranked the submissions based on technical contribution, accuracy, and clarity.  It always proves to be a challenge to select a single winner from the many fine papers covering many diverse aspects of EMC that are received.  The paper selected for 2010 use modal decomposition to derive a transmission line model for printed circuit board vias that can be implemented in circuit simulators.  The new model has a significantly faster computation time than that of a full-wave simulator while giving results that are in good agreement.  The practical benefit is an improved facility for of the design and optimization of high speed digital circuit boards for both signal integrity and EMC compliance.

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Assessing the EMC Performance of PCB Shields by Electromagnetic Modeling

In the past EMC Engineers have relied on metallic enclosures to contain electromagnetic fields and meet radiated emissions limits in military and consumer products. Modern commercial electronics products typically use molded plastic enclosures since they are considered to be aesthetically more pleasing than a metal enclosure, but also to save weight and cost.

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The Future of EMC Engineering: Locating RF Energy on a Printed Circuit Board

In the last issue, we examined the definition of who we are as a profession, which is an electrical engineer and nothing else; not analog, digital, digital microwave, or microwave. Everything we work with is analog. With this said how do those who are comfortable with wave propagation (RF), and only work with spectrum analyzers, identify and solve an EMC event?

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S-parameter Data Correction Using Time Domain Gating for PCB and Cable Applications

This paper describes how to remove the measurement artifacts caused by discontinuities in high frequency S-parameter data caused by the test connectors on the Printed Circuit Boards (PCBs) and cables. The frequency domain S-parameters are converted to the time domain to get the impulse response. Time domain gating is then used on this impulse response to remove reflections due to end connectors and/or other discontinuities. The gated impulse response is then transformed back to the frequency domain. The final result is a much improved S-parameter data set with unwanted resonance removed, allowing the PCB trace or cable loss to be determined.