pcb

Low-cost designs are often an underserved and challenging part of a layout engineer’s career and getting increasingly complicated.

The mirror technique is a very old technique to be used with PCBs when failing in radiated EMC tests. An easy solution to avoid changes in layout if the technique can be applied to your product.

This article discusses the crosstalk reduction between PCB traces by utilizing a guard trace between the traces and investigating the effect of the guard trace grounding.

At low frequencies, current takes the shortest path home. At high frequencies, it abandons direct routes for minimal inductance paths beneath traces. Ground plane discontinuities create radiation havoc—measurements prove theory right.

Software tools can give the EMC engineer a better chance to pass EMC requirements the first time.

The article explains crosstalk between circuit traces, showing how signals propagate between nearby conductors through capacitive and inductive coupling. It demonstrates experimentally how reducing separation distance and adjusting ground plane proximity affects near-end and far-end crosstalk voltages in PCB microstrip configurations.

It is very common for people doing simulations to make a measurement of a similar set up to validate the simulation. This is a reasonable precaution since modern simulation tools will give a very accurate answer to whatever question it is asked.

There are several scenarios where integrated circuits (ICs) are mounted on printed circuit boards (PCBs) which might be charged-up and experience CDM-like events.

Although the foundation of a failure analysis is rooted in science, there is also an art to completing one, successfully. The path from “problem discovery” to “problem solution” has many bumps and twists along the way and this article will hopefully help guide you on your journey.

The paper discusses the importance of understanding the current distribution below a printed circuit board trace.