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Crosstalk between PCB Traces – Time and Frequency Domain Measurements, Part 1

This article is the first of a two-article series devoted to the topic of crosstalk between PCB traces. In Part 1 of the series, we vary circuit topology, i.e., the distance between traces and the distance to the ground plane.

Do Measurements Validate Simulations?

It is common for people doing simulations to make a measurement of a similar set up to validate the simulation. The real issue is whether the tool user understands the problem well enough to capture the important features, and whether the user understands the tool well enough to use it correctly.

Return-Current Distribution in a PCB Microstrip Line Configuration, Part 2

This is the second article of a two-article series devoted to the return current distribution in a PCB microstrip line configuration.

Return-Current Distribution in a PCB Microstrip Line Configuration, Part 1

This is the first article of a two-article series devoted to the return current distribution in a 2-layer FR-4 PCB microstrip line configuration with a solid reference plane.

Troubleshooting EMI Issues Caused by Structural Resonances

Most EMI issues are caused by a resonance that is excited somewhere in the system. It may be a resonance of a cable acting as an antenna or a heatsink energized by the power electronics switches bolted to it, becoming a good radiator. In this article, we look at the indicators that signal the presence of structural resonances and provide techniques for fixing the EMI issues. Practical case studies are presented to demonstrate the techniques.
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Use of Ferrites in PCB Reference Planes

Should the reference (i.e., ground) plane be split into two separate sections and a ferrite bead installed between them to prevent unwanted radio frequency emissions? Let’s examine why this practice is not a good idea and should be avoided at all costs.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This month’s column is the last of three parts devoted to designing, testing, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This is the second of three articles devoted to the design, test, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity Using a Multilayer PCB

This is the first of three articles devoted to the design, test, and electromagnetic compatibility (EMC) immunity evaluation of multilayer PCBs containing analog circuitry. In this study, there are seven design variants that all contain a similar schematic but implement different PCB layout techniques.

PCB Return-Current Distribution in the Stripline Configurations

This article discusses the current distribution for the stripline configurations.
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