The Transistor: An Indispensable ESD Protection Device – Part 1
Nowadays in the semiconductors industry, the bipolar transistor is massively used for various functions in modern integrated circuits (ICs) products.
Commercial Versus Automotive ESD Integrated Circuit Qualification: Part 2
This is Part 2 of an article describing the difference between the electrostatic discharge (ESD) qualification requirements for automotive and standard commercial integrated circuits.
Commercial Versus Automotive ESD Integrated Circuit Qualification, Part 1
Integrated circuits intended for automotive applications have higher electrostatic discharge (ESD) qualification requirements than those intended for commercial and consumer electronics.
Industry Council’s Latch‑up Survey
This article provides a high-level overview of the Industry Council paper “Survey on Latch‑up Testing Practices and Recommendations for Improvements,” which describes the full analysis of the collected responses and lays a path for potential adaptations needed to accommodate its use in future technologies and applications.
Latch-up Electronic Design Automation Checks
This article introduces typical latch-up verification techniques to detect and prevent latch-up. These techniques rely on electronic design automation (EDA) tools to deliver the coverage necessary to identify and eliminate latch-up risks.
ESD in Joe’s Garage
When handling ESD-sensitive components, we must protect them from ESD damage.
Indium-gallium-zinc-oxide (IGZO) Thin-film-transistors (TFT) and ESD
The thin-film transistor (TFT) became commercially available slightly more than 30 years ago in the form of a switch for the Liquid Crystal Display.
Characterization for ESD Design, the TLP Zoo: Part 2
This is the second of a two-part series on transmission line pulse (TLP) testing.
Characterization for ESD Design, the TLP Zoo: Part 1
Author’s Note: This is the first of a two-part series on the TLP Zoo, the variety of transmission line pulse (TLP) systems used in the characterization of electrical components and system of ESD robustness. In ... Read More...
What Are External Latch-up and Internal Latch-up?
Overall, latch-up prevention is one of the most important tasks for both foundries and IC designers. Based on the chip design scheme, designers should select proper solutions to eliminate the ILU and ELU risks in chip design, referencing the foundry guidelines and latch-up silicon data to ensure minimal latch-up risks for the product.