Implementing Embedded ESD Detection, Part 2

This column focuses on the practical aspects of implementing embedded ESD detection. We’ll provide a step-by-step guide, discuss validation and testing methodologies, present case studies, and delve into future trends and innovations in the field.

Understanding Embedded On-Chip ESD Detection, Part 1

ESD “event detectors” have been used for years in factory environments to identify and remediate ESD discharges during manufacturing. Now design engineers are embedding system-level and on-chip ESD detection technologies into their systems to analyze and recover from both factory and field ESD events.

The Dilemma Between Customers and Suppliers on EOS Failures

During the last four decades, damage to devices from electrical overstress (EOS) has confounded both IC suppliers and customers. The Industry Council on ESD Target Levels investigated numerous EOS root causes and established a white paper on the subject, JEP174 [1].

Updated Trends in Charge Device Model (CDM)

As long as integrated circuits migrate to new technologies and advances are made in packaging more integrated circuit dies into a single package, the CDM challenge is going to get harder.

ESD Challenges in 2.5D/3D Integration

2.5D/3D integration is an Integrated Circuit (IC) packaging technique that allows the combination of dies of the same or different technologies in the same IC package.