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ESD Target Levels: The Industry Council

An Industry Council on ESD Target Levels was established in 2006 when a few IC companies decided to understand why during the product qualification process at every corporation, passing the ESD test is a frequent bottleneck for customer acceptance.

Electrostatic Discharge Technology Roadmap

This document provides estimates of future ESD device thresholds and their potential impact on ESD control practices. The threshold estimates reflect the prevailing trends in semiconductor technology as viewed by selected industry leaders. These projections are intended to provide a view of future device protection limitations driven by performance requirements and technology scaling. It also provides a common view of expected performance for device suppliers and users. Finally, these trends point to the need for continued improvements in ESD control procedures and compliance.

Lightning Damage to Equipment without a Metallic Connection to an External Communications Service

Lightning damage to equipment with a metallic (wired) connection to a communications service has been studied for many years, resulting in a series of Telcordia GR, ATIS and TIA standards in the United States, and ITU-T recommendations elsewhere.

Induction: What it means to ESD

Associate Professor Neils Jonassen authored a bi-monthly static column that appeared in Compliance Engineering...

How Is Static Electricity Generated?

Associate Professor Neils Jonassen authored a bi-monthly static column that appeared in Compliance Engineering...
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Fundamentals of Electrostatic Discharge: Part 5: Device Sensitivity and Testing

In Part 2 of this series we indicated that a key element in a successful static control program was the identification of those items (components, assemblies and finished products) that are sensitive to ESD and the level of their sensitivity. Damage to an ESDS device by the ESD event is determined by the device’s ability to dissipate the energy of the discharge or withstand the current levels involved. This is known as device “ESD sensitivity” or “ESD susceptibility.”

Fundamentals of Electrostatic Discharge – Part 6: ESD Standards

The electronics industry is continually shifting. Device density and technology is more complex. Electronics manufacturing is more heavily reliant on out‑sourcing. The ESD industry seems to have jumped into this swirling eddy headfirst. ESD control programs have mushroomed. Black has been replaced by green, blue and gold. Shielding bags dominate the warehouse. Ionizers exist along side wrist straps and ground cords. An early history of “smoke and mirrors,” magic and lofty claims of performance is rapidly and safely being relegated to the past.

Fundamentals of Electrostatic Discharge: Part 4: Training and Auditing

Your static control program is up and running. How do you determine whether it is effective? How do you make sure your employees follow it? In Part 3, we suggested that there were at least nine critical elements to successfully developing and implementing an effective ESD control program. In Part 4, we will focus on two more of these elements: training and auditing.

Fundamentals of Electrostatic Discharge Part 3: Basic ESD Control Procedures and Materials

Here are some of the primary specific static control procedures and materials that will become part of your ESD Control program.

Decreased CDM Ratings for ESD-Sensitive Devices in Printed Circuit Boards

Many sources recently have reported that electrical failures to components previously classified as EOS (Electrical Overstress) are instead the result of ESD (Electrostatic Discharge) failures due to charged-board events (CBE) [1,2]. A charged printed circuit board assembly stores substantially more charge than a discrete device as its capacitance is larger. A subsequent discharge of the board assembly results in increased current for that event - versus that of the discrete component. Consequently, a device’s CDM (charged device model) rating is lowered when mounted in a printed circuit board (PCB). In an attempt to get a feel for just how much it is lowered, we conducted CDM stress tests on components in discrete form, and again after insertion into larger and larger sized pc boards. We found that the CDM ratings are lowered dramatically!

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