EOS/ESD Association

Reliability issues need to be continuously addressed during technology development as technologies further advance into novel transistor structures such as FinFETs and Multi-gate devices.

This is Part 2 of an article describing the difference between the electrostatic discharge (ESD) qualification requirements for automotive and standard commercial integrated circuits.

Integrated circuits intended for automotive applications have higher electrostatic discharge (ESD) qualification requirements than those intended for commercial and consumer electronics.

This article provides a high-level overview of the Industry Council paper “Survey on Latch‑up Testing Practices and Recommendations for Improvements,” which describes the full analysis of the collected responses and lays a path for potential adaptations needed to accommodate its use in future technologies and applications.

There is often confusion about the interaction between IC-level component ESD protection and the appropriately required system-level ESD protection strategy.

This article introduces typical latch-up verification techniques to detect and prevent latch-up. These techniques rely on electronic design automation (EDA) tools to deliver the coverage necessary to identify and eliminate latch-up risks. 

The thin-film transistor (TFT) became commercially available slightly more than 30 years ago in the form of a switch for the Liquid Crystal Display.

This is the second of a two-part series on transmission line pulse (TLP) testing.

Author’s Note: This is the first of a two-part series on the TLP Zoo,...

Overall, latch-up prevention is one of the most important tasks for both foundries and IC designers. Based on the chip design scheme, designers should select proper solutions to eliminate the ILU and ELU risks in chip design, referencing the foundry guidelines and latch-up silicon data to ensure minimal latch-up risks for the product.