emc concepts explained Archives - Page 2 of 8

Sinusoidal Steady State Analysis of Transmission Lines

This is the second of the three tutorial articles devoted to the frequency-domain analysis of a lossless transmission line. This article shows numerous methods of calculating the voltage, current, and input impedance at various locations on the transmission line, using the Circuit Model.

Sinusoidal Steady State Analysis of Transmission Lines

This tutorial article is a part of the three-article series devoted to the frequency-domain analysis of a lossless transmission line.

Concept of a Phasor in Sinusoidal Steady State Analysis

This article introduces a concept of a phasor which is extensively used in several EMC topics including electromagnetic waves, antennas, and transmission lines.

Shunt Inductive Discontinuity along the Transmission Line and Transmission Lines in Parallel

This article discusses the impact of a shunt inductive discontinuity along the line as well as the effect of feeding two transmission lines in parallel. The analytical results are verified through the HyperLynx simulations and laboratory measurements.

Transmission Line Reflections at a Shunt Resistive and Reactive Discontinuity Along the Line

This article discusses the reflections on a transmission line at a shunt resistive and capacitive discontinuity along the line.

Eye Diagram

This article addresses the impact of driver, HDMI cable, and receiver on signal quality using data eye, based on the following criteria: data eye opening, data mask violation, and data jitter.

Eye Diagram

This is the first of two articles devoted to an eye diagram. In this article, the fundamental definitions and concepts are presented.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This month’s column is the last of three parts devoted to designing, testing, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

This is the second of three articles devoted to the design, test, and EMC immunity evaluation of multilayer PCBs containing analog circuitry.

Evaluation of PCB Design Options on Analog Signal RF Immunity Using a Multilayer PCB

This is the first of three articles devoted to the design, test, and electromagnetic compatibility (EMC) immunity evaluation of multilayer PCBs containing analog circuitry. In this study, there are seven design variants that all contain a similar schematic but implement different PCB layout techniques.

Tagged emc concepts explained