Dolphin Abessolo-Bidzo

A new version of Technical Report TR18.0-01-25 (TR18) on ESD Electronic Design Automation (EDA) Checks by the ESD Association’s Working Group 18 is about to be released. This article, divided into Part 1 and Part 2, provides guidelines for the EDA industry and the ESD design community for establishing a comprehensive ESD verification flow to address the ESD design challenges of modern ICs.

This article introduces an upcoming Technical Report (TR18) from the ESD Association on Electronic Design Automation checks. It details integrated ESD verification throughout IC design phases, covering schematic-based topological checks and layout-based verification to ensure comprehensive ESD protection in modern circuits.

In this article we discuss the MOS transistor in the role of ESD protection for high-voltage applications and take a look into a possible future of ESD protection devices for high-performance computing applications.

Nowadays in the semiconductors industry, the bipolar transistor is massively used for various functions in modern integrated circuits (ICs) products.

The methodology of the state of the art of HBM and CDM layout simulations tools is described. Two real-life case studies are presented briefly and the outlook towards future developments is discussed.