ESD Co-Design for High-Speed SerDes in FinFET Technologies

The narrow ESD design window in current FinFET technologies creates a special challenge for the robust ESD design of high-speed interfaces. Smart circuit-ESD co-design can help achieve the required ESD robustness without deteriorating functional performance.

Understanding Embedded On-Chip ESD Detection, Part 1

ESD “event detectors” have been used for years in factory environments to identify and remediate ESD discharges during manufacturing. Now design engineers are embedding system-level and on-chip ESD detection technologies into their systems to analyze and recover from both factory and field ESD events.

Troubleshooting EMI Issues Caused by Structural Resonances

Most EMI issues are caused by a resonance that is excited somewhere in the system. It may be a resonance of a cable acting as an antenna or a heatsink energized by the power electronics switches bolted to it, becoming a good radiator. In this article, we look at the indicators that signal the presence of structural resonances and provide techniques for fixing the EMI issues. Practical case studies are presented to demonstrate the techniques.

Energy Release Quantification for Li-Ion Battery Failures

The growing application of lithium-ion batteries brings with it an increased risk of unanticipated energy releases and thermal runaway. Quantifying battery energy release characteristics during product design can help mitigate those risks.

EMC Management in Charging Applications

Implementing a process of EMC compliance for a specific project is much more than simply ensuring that the design engineers follow a long list of “do’s and don’ts” in the form of EMC design rules. Following this process will reap benefits when EMC performance is evaluated at the end of the design process.