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Poor Power Distribution Network Leads to Unexpected Radiated Emissions

Figure 1: Near-field probing results identifying the noise source

Recently, I worked on a radiated emissions case involving narrowband emission failures in the 100 MHz to 1 GHz range. Identifying the source of such narrowband noise is usually straightforward, and, in this case, a near-field sniffing probe quickly led us to the culprit: the clock signal of a high-speed SPI line between the microcontroller and the flash drive on the PCB. This is demonstrated in Figure 1.

Figure 1
Figure 1: Near-field probing results identifying the noise source

However, during troubleshooting, I discovered something unexpected—other I/O lines, much slower by nature (such as an I2C line running at just tens of kHz), were also exhibiting the same 100 MHz harmonics. This became evident when I used an RF current probe to measure common-mode noise on the wires connected to the PCB, shown in Figure 2.

Figure 2: (a) System diagram illustrating I/O lines radiating harmonics of the clock frequency; (b) RF current probe measuring radiated emissions on the wiring

To mitigate the noise on the other I/O lines, I initially used high-impedance ferrite beads. When selecting ferrite beads, a simple rule applies:

  • Their impedance should be low enough at the signal’s operating frequency to avoid signal integrity issues and
  • Their impedance should be high at the noise frequency to effectively suppress unwanted emissions.

In this case, the solution seemed straightforward, as the I/O lines operated at relatively low frequencies compared to the 100s of MHz noise we were trying to suppress. But while the ferrite beads helped, I was eager to understand the underlying mechanism behind this unexpected harmonic behavior.

Figure 3: New measurements with two ferrite beads on the I2C lines
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The best resource I found that explains this in detail is Prof. Todd Hubing’s presentation1 (downloadable link provided in the endnote).

Prof. Hubing explains that while DC power and low-speed digital signals do not usually have enough power at radiated emission frequencies to be problematic, they often carry strong high-frequency currents that can contribute to emissions. A poor power distribution network (PDN) design can result in high-frequency voltage fluctuations on every input and output trace connected to the IC.

In his presentation slide, page 17 shows that more current is being drawn from the DC power supply pins than from the signal pins. Page 18 highlights that significant high-frequency currents appear on low-speed I/O, including outputs that never change state during normal operation.

It seems that the issue arises due to two main factors:

  • IC design—Some ICs handle internal noise containment better than others and
  • PCB layout and PDN design—Poor layout can cause unintended noise propagation.

I then followed a great conversation with Dan Beeker, Technical Director at NXP, and his perspective was fascinating.2 Dan emphasized that poor PDN design is often the root cause of these issues and shared best practices for mitigating them.

For instance, a high-speed SPI design like this will likely never perform well on a 2-layer PCB. However, with a well-designed 4-layer PCB that incorporates a proper microstrip line structure, achieving good EMC performance is much more feasible.

To optimize PDN design and minimize unexpected emissions, key factors to consider include:

  • Distance from the IC pin to the first capacitor—This should be within 1/20 of the wavelength of the driver’s switching speed to prevent voltage depletion effects
  • Transmission line impedance—It should be matched to the current requirements to ensure stable operation (i.e., making sure the “bucket” is big enough to handle the switching demand) and
  • Drive strength of clock signals—Many manufacturers default to a very fast dv/dt, which is often unnecessary. Reducing the slew rate in software can significantly help.

I collaborated with the client to re-spin the PCB design, focusing on power distribution network improvements. The goal was to eliminate the ferrite beads altogether and instead use a simple resistor on the clock line for better impedance control.

This case was an excellent reminder that unexpected emissions often originate from power integrity issues, not just high-speed signals. A well-thought-out PDN strategy can make or break EMC performance.

Endnotes

  1. Todd Hubing, “Automotive circuit board and system design for EMC.
  2. Dan Beeker, “A Novel Approach to Power Distribution: Building a Solid Foundation.”

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