Remcom partnered with Xema Design Acceleration to enable Xema’s PinBuilder application to create complete XFdtd EM simulation models, including high-speed printed circuit board (PCB) layout traces and via geometries for validating critical signal integrity performance. Model generation with PinBuilder helps minimize return loss, insertion loss, and crosstalk within the pin-field of SerDes, memory busses, analog signal routing, and similar high-speed digital PCB designs.
Benefits to design engineers include:
- Proactively create high-speed PCB layouts that are correct by design.
- Generate several candidate models with PinBuilder, run EM simulations, and identify critical issues before committing to layout.
- Detect problematic channels before PCB fabrication and assembly.
- Improve the utilization of the available PCB technology such as routing channels.
- Achieve informed decisions when selecting PCB and connector technologies for specific SerDes implementations.
To learn more about PinBuilder, visit Remcom’s website.