There is nothing worse than believing the correct voltage is being applied to a Device Under Test (DUT), only to find out a cable is broken and the only thing that has been tested is the hipot tester itself and part of the cable. This is especially true if this fault was not caught in time and product has already been shipped to the customer. While a skilled operator may notice a difference in leakage, collecting data and evaluating the data on a regular basis may also reduce such an error. However, there are other precautions that may be put in place to ensure the safety test is performed correctly. Two common product safety tests seen in production are the dielectric strength test (commonly referred to as hipot) and a ground test. The hipot test stresses the insulation of a product, while the ground test ensures proper ground connections within the product. The two most common ground tests are ground bond and ground continuity. This article will discuss these two common tests, as well as safeguards to ensure proper testing.
Since the implementation of the “New Approach” and the CE Marking in the European Union, the requirements for device labeling have evolved, been reviewed, variously implemented and not uniformly enforced. A closer look at post-market compliance is an evolving trend across many economies. Discussions in the European Union, North America and the Asia-Pacific Economic Cooperation (APEC) continue to focus on post-market surveillance and enforcement. One area of scrutiny, particularly in Europe is device labeling.
Manufacturers and distributors of electronic and electrical devices are required to meet various Product Safety standards established by the United States, Canada, European Union, and various global agencies. Today manufacturers have multiple options for testing their product to various North American Standards through Nationally Recognized Testing Laboratories (NRTLs), as well as independent value added laboratories that have approvals for NRTL testing under a variety of programs. Good independent labs must be assessed to ISO 17025 for testing laboratories, similar to those requirements found under ISO 9000 requirements for manufacturers.
In the last issue, we examined the definition of who we are as a profession, which is an electrical engineer and nothing else; not analog, digital, digital microwave, or microwave. Everything we work with is analog. With this said how do those who are comfortable with wave propagation (RF), and only work with spectrum analyzers, identify and solve an EMC event?
This article focuses on methodology, techniques and tools to identify, classify and quantify ESD occurrences in back-end semiconductor and electronics assembly manufacturing. Proper methodology of detecting and measuring ESD Events in working tools handling ESD-sensitive components, identifying CDM-type of discharges and associating discharges with the specific steps of the process is described in details on a level usable to a wide range of specialists. Use of tools, such as high-speed storage oscilloscopes, special antennae, ESD detectors and monitors will be explained in detail. This article should benefit increasing numbers of process engineers who are struggling to maintain yield while the devices are getting increasingly more and more ESD-sensitive.
The start of a new year is a time when, traditionally, we reflect on the progress we made during the year passed and set our goals for the new year. More often than not your professional development goals include training or some form of higher education to expand or refresh your technical knowledge. To assist you in choosing affordable solutions to meet your training goals in 2010, you’ll find here sources of compliance related seminars and workshops offered online and on location, public and private.
In Chapter 2, I introduced Maxwell’s Equations in their “integral form.” Simple in concept, the integral form can be devilishly difficult to work with. To overcome that, scientists and engineers have evolved a number of different ways to look at the problem, including this, the “differential form of the Equations.” The differential form makes use of vector operations.
The ESD Association and JEDEC Collaborate on Standards Development for Harmonized Electrostatic Discharge Test Methods
In September 2006, a small group of ESD control and design stakeholders assembled in a small conference room at the LaPaloma Resort in Tucson, AZ to discuss how the ESD Association (ESDA) and the JEDEC Solid State Technology Association (JEDEC) might harmonize some of their key device (component level) standards documents. Some of the stakeholders involved in those initial discussions (and similar meetings over the next six months) were integrated circuit manufacturers, integrated circuit test manufacturers, original equipment manufacturers, integrated circuit test service providers, and representatives from the ESDA and JEDEC. This first meeting was somewhat extraordinary as these industry stakeholders were able to bring JEDEC and the ESDA to the same table to start working on the harmonization efforts after other previous attempts failed. The key individual sponsoring this meeting was Kay Adams, the ESDA President in 2006-2007.