Designing with Capacitive Touch for Commodity Applications

Giving you the tools you need to replace that old mechanical button with a sleek capacitive sensor

Interfacing to devices such as our smartphones, appliances, and cars have become the cornerstone of high‑end industrial design. Smooth, polished interfaces that once found themselves limited to high‑end devices such as smartphones have now found their way into commodity products that we use on a daily basis. The motivation for this includes a wide variety of positives that all stem from removing a mechanical button from your user interface:

• You gain a clean, high end looking interface, along with the reliability of getting rid of a failure point which in most cases is a mechanical button;
• It allows industrial designers to get very creative with the way they layout and design their interfaces for products not traditionally known for their aesthetics, such as a washing machine interface; and
• Lastly, and probably most importantly, you gain a nominal cost reduction on a per button basis as the button is not a membrane or mechanical switch assembly; these usually require assembly time which is only exacerbated during high volume commodity designs.

With these obvious benefits, it is no wonder you see capacitive touch interfaces being introduced into more than just our smartphones. However, a good design with capacitive touch isn’t as simple as replacing the buttons on your legacy oven interface and hoping it will work. A successful design is rooted in:

• Understanding the technology behind the peripheral as each microcontroller unit (MCU) implementation is just a little bit different, and they would say unique;
• Understanding parasitic capacitance and how things like floating wires influence the system;
• Understanding the software that controls the peripheral hardware block; and
• Understanding how to design your product such that, when undergoing traditional EMC testing (to gain that coveted CE mark), you are able to breeze right past it.

 

With the need to understand more than just standard debouncing of a simple mechanical switch, capacitive touch designs are trickier than their traditional mechanical counterparts. This article will cover the design challenges a hardware engineer will face when implementing a new capacitive touch design or retrofitting an existing commodity design. First, we’ll address design‑related topics such as how such a device operates and the components that make up a capacitive touch system. Then, we’ll move on to user feedback, highlighting how simple things like driving multiple LEDs off of an unregulated supply or leaving LED traces floating can negatively affect system performance.

Next, we’ll touch on system‑level testing to meet the requirements of the IEC 61000 series of standards. Problems related to obtaining the coveted CE mark are centered on conducted susceptibility, or how the sensor interface reacts when introducing noise to the system. This is usually compounded by the fact that the AC mains are usually unfiltered, filtered off board at some other point in the system, or poorly filtered due to cost constraints. Lastly, after understanding the general design concerns, we’ll provide a checklist. This is because each MCU manufacturer implements this technology in their own way, through application notes, layout guides, and software implementation.

While most of these topics apply broadly to any capacitive sensing system (of which there are many), these design tricks and tips were meant to focus on general‑purpose MCUs with a peripheral built for capacitive touch, and not on the touch screen technology you see on a smartphone. To understand what that means, we first focus on the components that make up and the function of a capacitive touch system.

The Basics of Capacitive Touch

When searching for capacitive touch systems, each microcontroller supplier will point you towards their own series of application notes, software drivers and reference designs in an effort to steer you into their ecosystem. In general, however, the majority of these design guides have a similar theme and all contain the following general components, as depicted in Figure 1.

The functionality starts with the MCU hardware which varies slightly from manufacturer to manufacturer. The signals that this device generates creates an electrostatic field associated with the sensor connected to MCU, which the MCU then measures with specialized hardware. The traces and routing that carry these measurement signals to the pad make up the next part of the system. Many application notes will call these out and state that care must be taken with both:

• The trace parasitic capacitance; and
• How close the traces are to each other and to other sensor pads. This helps avoid potential false touches due to an individual not touching the right spot on the printed circuit board.

For these reasons, printed circuit board (PCB) design parameters such as the trace thickness, height, and width are important factors in the design. Lastly, once the field is generated at the pad, its performance can be affected by a variety of design factors which include the pad shape and the covering used.

An example of a nominal capacitive touch system is shown in Figure 2.

When researching varieties of capacitive touch systems, it is inevitable that the next decision that a designer must make is to implement either mutual or self‑capacitance as a means of sensing. This simply means whether you want the electrostatic field to be generated between plates, or between a plate and the surrounding components. Each approach has its own drawbacks and they are covered in the next section.

Self vs. Mutual Capacitive Touch

The most basic model for capacitive touch is modeled as a parallel plate capacitor that the trace and plate make with a reference/return path. The electrostatic field the MCU creates couples to any metallic structure which can include any of the following that exist near the sensor pad or trace:

• Metal case
• Reference plane
• Other traces
• Another sensor pad
• Floating LED traces (I cannot stress this one enough!)

Self‑capacitance relies on the simple fact that coupling between the sensor and its surroundings does not change drastically with time. As a result, the coupling between the sensor pad and its environment is represented as a constant capacitance C_p (typical values include between 10-50pF).

However, the one large caveat to this is floating traces, usually attributed to how the embedded engineer drives signaling light emitting diodes (LEDs). If the MCU treats the biasing of these diodes as “floating‑until‑activated,” then the board level parasitics do change, very drastically, when the MCU drives either end of the LED to power or 0v, depending upon the scheme the hardware uses (popular methods are port expanders or transistor drive). The solution for this is keeping any floating traces at a constant potential, either by driving traces to return or VCC or by pulsing the proper ports to an average voltage.

In general, the largest changes in PCB capacitance happen when a finger interacts with the sensor pad and stray capacitances change the total capacitance by adding its own capacitance to it, given by C_f (roughly 10pF). With the addition of finger capacitance, the total capacitance in the system becomes (1). This forms the basis for self‑capacitive touch.

C_total = C_finger + C_parasitic (1)

By measuring this increase in capacitance, the MCU is then able to discern the status of the sensor. This type of scenario describes the self‑capacitance method of detecting a touch, as it measures the capacitance that the human body adds to the capacitance already formed between itself (the sensor pad) and its surroundings, and is illustrated in Figure 3.

The sensor pad shape is simple and relies on the system not having a lot of parasitic capacitance between the pad and its surroundings to increase its sensitivity. Large metallic structures such as copper return planes are the biggest detriment to sensitivity.

Sensor shapes that connect to the hardware vary between manufacturers, examples of which are included in Figure 4.

While each manufacturer has their own shapes, in practice their importance is minimized as long as they are designed to match the shape of a human finger, usually a circle or a square, and which are big enough to facilitate human contact.

In contrast to the self‑capacitance method, most hardware IP is able to drive a pair of sensing channels connected to corresponding sensor pads to create an electric field not only between the plates and the environment but also between the two pads themselves; this is usually referred to as mutual capacitance.

The electrostatic field in this method exists in such a way that it is contained between the sensor plates and functions so that that the hardware senses a decrease of capacitance in the system when touched. This is illustrated in Figure 5.

Again, the sensor pad can be specific to a manufacturer. But, in general, all share a common interlocking design theme between a transmitting pad and a receiving pad, as shown in Figure 6.

Before describing how the layout can drastically impact the measurement taken by the hardware, it is important to understand how parasitic capacitance common to both methods of measurement is represented in the system.

What is Parasitic Capacitance and What Factors Control It?

Parasitic or stray capacitance is something that hardware engineers account for in their design of a return path for currents that occur between two conductive structures ‑ generally current carrying traces and copper planes under areas of the printed circuit board. Many printed circuit boards control this type of stray capacitance in specific areas of the board so that currents have as short a return path as possible to their source through the creation of short loop areas. However, in a capacitive touch system, the same techniques could result in desensitization due to the way the hardware operates.

As demonstrated at the beginning of this section via equation (1), the total capacitance of a pad that the microcontroller measures is comprised of both this parasitic capacitance and the capacitance that the human body forms between the finger and ground. However, the human body capacitance that it must measure is usually a percentage of the parasitic capacitance that forms between conductors.

This leads to two important characteristics that must be accountable for in the design:

• The higher the percentage of the body capacitance, the more sensitive to touch the system will be. This usually results in a decrease in parasitic capacitance by not having a solid copper return plane behind the pads or the non‑parallel running of traces.
• Too much capacitance in the system will hinder the ability of the hardware to accurately estimate the total capacitance in the system as the driver will not be able to either drive the total system capacitance or drive it inside of a measurement period.

Since body capacitance is outside the control of the designer, reducing the parasitic capacitance between the pad/trace and surrounding objects is accomplished by techniques such as not extending a solid plane under the pad, or not running long parallel traces. It is for this reason you see design notes limiting the following:

• Trace length, especially trace length over a solid piece of copper, as this increases the parasitic coupling between the trace and plate;
• Trace height above a return path; or
• How much of the pad exists over a solid copper plane (often you will see EMC sensitive designs get around this by meshing the return plane).

In any of these situations, the goal is to reduce the coupling of the trace and pad to a solid copper return path, as this increases the overall capacitance associated with that sensor. In short, it is not just the sensor that makes up the sensing system. These design choices have a large impact on the routing and stack‑up and will be briefly discussed next.

Trace Length

Trace length impacts self‑ and mutual‑capacitance systems differently. First, we’ll focus our discussion on a self‑capacitance system.

In a self‑capacitance system, the trace length of the self‑capacitance pad and the pad itself form a ratio. Manufacturers normally place an upper limit (such as 7” or 170mm) on the trace length and recommend not exceeding this. This is because longer traces will carry with them more parasitic capacitance, resulting in desensitization of the sensor. To the measurement device, this will look like a smaller sensor that will be more difficult to interact with. Conversely, shorter traces carry with them less parasitic capacitance and will, therefore, have more sensitivity since the resulting parasitic capacitance is small. This is often referred to as “looking” electrically large to a touch. Figure 7 diagrams this situation, where sensor A and B are closer to the MCU and are depicted to be larger than D, which is located farther away from the MCU.

If the sensor lines must cross other sensor lines or other, “noisy” signals, it is recommended to cross them on opposite sides of the board and at right angles, as shown in Figure 8. This reduces the coupling between the aggressor trace and victim trace, normally the measurement trace.

When designing with mutual capacitance in mind, the same routing rules apply. But, since the hardware measures the interaction between two plates, it is important not to route receive and transmit lines next to each other. Doing this prevents capacitive crosstalk between the two traces or other pulse carrying traces (i.e., PWM, communication, clock lines). So care should be taken to route the receive wiring as far as practical from these traces.

The minimum keep‑out should be one finger distance between the two, so as to not inadvertently allow a coupling path to occur during the interaction with the device. This rule is important to follow when traces come close to neighboring pads since a clearance distance reduces the risk of improper detection due to a non‑accurate touch, such as which may occur across traces instead of a pad. An example of this is shown in Figure 9.

Recommended dimensions and layouts are demonstrated in almost every manufacturer’s hardware design guide, so they will not be included here. But the general goal of these rules is to 1) prevent crosstalk; 2) prevent unintended touches due to stray fingers, and 3) minimize the capacitive loading of the sensor and trace. If traces must cross due to board constraints, avoid long parallel runs. And, if they need to cross, they should do so at 90 degrees in order to minimize the possibility of crosstalk between the two traces.

Other methods for avoiding false key detection in layout include:

• Protecting the two traces with a guard trace to allow the noisy line to couple to;
• Route the receive lines on the opposite side of the board, separated by a reference trace; and
• Route the receive lines under a return plane.

Return Planes

Care must be taken in the routing and placement of return planes since their proximity to any sensor increases the parasitic capacitance of that sensor pad. For this reason, it is recommended that you do not include a solid plane behind the pads and that you adhere to spacing requirements when near the pads to increase sensitivity.

However, on multilayer applications, a mesh return plane behind the pads at no more than 30‑40% fill is recommended to aid in the rejection of conducted noise issues. The tradeoff between the slight reduction in sensitivity and the increase in electrical noise immunity make this a useful design choice if required. The return should be tied directly to the MCU return (Vss) to ensure a low impedance return path (an example of these guidelines is shown in Figure 11), and the traces should be placed perpendicular to the mesh lines if possible to further minimize coupling.

A usual stack‑up for a multilayer touch board includes four layers. Depending on the design being implemented, it is recommended that the touch board be at least one or two of the planes in the stack‑up. If at all possible, do not extend any solid return plane copper on any layer under the sensors, as that will increase the parasitic capacitance and result in a decrease in sensitivity. See Figure 12 for an example.

While the mutual method is more robust to parasitic capacitances due to the measurement method, many of the same methods that exist for improving the performance of a self‑system work equally well in a mutual system. Therefore, if using a solid return plane in order to reduce parasitics, it is important to route the receive trace farthest away from the return layer to avoid a loss in sensitivity. This situation is illustrated in Figure 13.

Now that we’ve discussed how to pour our return paths, design the stack‑up, and route the traces, the last thing to touch on is the inclusion of external components.

External Components

The external components that make up a capacitive touch system are the most varied among capacitive touch hardware providers. This is because each hardware design implements sensing activity in a slightly different manner. Some use a voltage‑based method which shapes a wave, while others use current which measures the charge/discharge cycle of the parasitic capacitance. And, as such, you will often see both:

• Resistors – Which are used in conjunction with either parasitic capacitance or a physical capacitor to shape a measurement pulse (in a voltage‑based sensing method), or to limit surge coming from the measurement port (in a current sensing method).
• Capacitors – Which are used in conjunction with the previously mentioned resistor to create a time constant for the measurement pulse (in a voltage‑based sensing method).

Lastly, there may be times during specialized designs there might be too little capacitance for the hardware to be properly biased to measure the pulses. To solve this problem, designs will often add small capacitors (in the pF range) on the sensor side of the trace to properly bias the hardware, as shown in Figure 14.

Lastly, is important to note that a design that strictly follows the design guidelines can also impact the performance of the system.

Dealing with External Influences

Capacitive touch systems designed to replace their mechanical counterparts are prone to noise from a variety of different sources. For example, buttons attached to GPIO ports, with relatively little software debouncing are inherently robust to a wide range of sources, such as PWM sources, relays, and poorly decoupled power supplies. To properly characterize any sort of noise issues, the EMC model of source/path/receiver can be used to properly break down the system into its parts.

The majority of the noise sources come from either the higher harmonics of a PWM, a 60hz harmonic from a poorly decoupled power supply, or communication/timing lines. These sources, along with their coupling channel, are each able to affect the end measurement in one of the following ways:

• Conducted– A conducted noise channel is one that forms a galvanic connection to the system.
  An example of noise sources is 50/60Hz low‑frequency AC noise from a power supply, or switched mode power supply harmonics.
• Radiated ‑ A radiated noise channel is one that couples wirelessly due to nearby traces via capacitive/magnetic fields with the trace or pad. Examples of sources that travel this type of noise channel are the drivers of an LED or LCD interface and communication interfaces.
• Environmental – Not typically considered an EMC problem, this type of noise occurs over time as the environment changes such as water, humidity or temperature affect the properties of the parasitic capacitance is measured. In addition, environmental factors can also include a customer interaction with the touch system (which could lead to an unintended coupling path not previously seen) or an unforeseen interaction during the excitation of HMI (i.e., lighting, screen turning on, etc).

As these sources and noise channels become more pronounced, they can greatly affect the touch measurement, causing errors that eclipse touch and non‑touched thresholds.

Dealing with Traditional Sources of Noise

The topic of dealing with conducted and radiated noise on a circuit board, especially one as susceptible to electrical noise as capacitive touch, could be the subject of its own book. However, there are a few tricks one can employ when dealing with conducted and radiated testing to limit electrical noise’s impact.

The most common test for electrical noise with capacitive touch is found in IEC61000‑4‑6, which tests a device against transients and surges coupled in through the power mains. Because of this, the first and best way of dealing with electrical noise is to mitigate it at the entry point and by employ filtering in the power supply. This results in some combination of either:

• A power line filter in the form of a PI filter (an example is shown in Figure 16). The frequencies of interest that the filter should be tuned to are usually used to block noise coupled in at the 10MHz and below range. Above that, the impedances of the system are enough to mitigate the issue.
• If noise gets by the power line filter or the filter is not as robust, the next option is the inclusion of bypass capacitors that direct noise away from the area of the PCB that houses the sensors. Bypassing with a proper return plane is a powerful tool in noise mitigation (sometimes at the expense of sensitivity).
• Care must be taken in routing longer traces, especially those over a return plane, as they start to approach resonant wavelengths of a monopole in a single‑ended self‑capacitive setup.

However, if filtering components are outside of your commodity design budget, or if space is an issue, you can add software filtering and debouncing. Examples include moving averaging and infinite impulse response filtering, the effects of which are illustrated in Figure 17.

Dealing with Non‑Traditional Sources of Noise

While electrical noise sources are traditionally the biggest concern for capacitive touch designs, another chief concern is external environmental factors which usually center on how the design deals with water and moisture. Water has a high rate of permittivity which generates capacitance over the space on which it exists. This means that droplets can spread touches across sensors that are covered. An example of this is shown in Figure 18, in which the left picture shows water over a self‑capacitance sensor which will trigger a touch on the top right sensor without a finger being present. The right picture is a mutual capacitance scenario that has water pooled over the top two sensors, a situation in which both sensors will trigger when either is touched.

This is a common problem on cooktops and refrigerator interfaces where moisture can build up and cause either of these two situations. Since this is a physical limitation of the way the measurement is taken in most systems, the proper mitigation techniques are rooted in either:

• Intelligent sensor layout, where forethought is given to placing sensors where water can’t pool. If running water is expected, consider placing traces and sensors perpendicular to the flow of water.
• If the environment isn’t deemed too extreme, successful water rejection can sometimes be accomplished through software by performing multi‑touch rejection.
• In other instances, making use of a guard trace around vulnerable sensors can result in other buttons being disabled.

A checklist covering the key points of design for capacitive touch can be helpful in quickly identifying potential problems during a design review.

Creating a Check List for Design Reviews

The information covered in this article covers many different aspects of a capacitive touch design, and more specific information can be found in the hardware design guide of your chosen MCU. If you are an engineer checking a design, it is important to review the guide and identify the following issues in order to come prepared to a design review:

1. Are all traces the proper recommended length? If not, is there anything that can be done to mitigate the effect, such as trimming planes, or changing the sensing hardware settings.
2. Are the pad shapes the recommended shape? While usually not a concern, it is important to give consideration to the shape of the pad, since too much capacitance associated with the pad and the hardware may have problems driving it.
3. What measurement method was implemented? The design reviewee should be prepared to defend their choice as to why they chose either self or mutual capacitance as a measurement method.
4. Did your design need external components and, if so, were they placed in the correct order on the PCB? Are they the correct value?
5. Has the appropriate counter measured for external influences such as injected noise or water been considered when laying out traces? Sensors laid out such that water can easily pool over one or multiple sensors can falsely trigger, and care must be taken to design the PCB to mitigate this situation
6. Have any loops been created, and what do the return plane and stack‑up look like? Unlike traditional mechanical designs, electrical noise will cause the potential of surrounding metals to change as the noise couples through the system.
7. Do you have any floating LED traces and do they share a supply with the MCU?

Paying attention to these issues in a design review in accordance with the recommendations of the sensing hardware supplier will save costly and time‑consuming discussions with application engineers.

Conclusion

Capacitive touch buttons are becoming more common as sensing hardware and manufacturing processes get more robust. And, as such, they are more and more likely to be used as replacements for more expensive and failure‑prone switches. When replacing these designs, it is important to:

• Understand what capacitive touch sensing is, and how it is implemented by your hardware manufacturer;
• Understand how your PCB design choices impact the performance of the system; and
• Understand the environment in which your device will be used.

By understanding and addressing these key points, I hope that you’ll be able to achieve the most efficient and cost‑effective design process for your capacitive touch design.

        
Christopher Semanson works at Renesas Electronics America Inc. as a Functional Safety Systems Manager in Durham, NC supporting the design of PMICs and other power generation semiconductors in automotive applications in accordance with ISO26262.  He has five years of experience in EMC Education at the University Of Michigan, teaching EMC and Electronics with Mark Steffka. He has a bachelor’s degree in Electrical and Computer Engineering and a master’s degree in Electrical Engineering from the University of Michigan Dearborn. Chris can be reached at christopher.semanson@renesas.com.