Many sources recently have reported that electrical failures to components previously classified as EOS (Electrical Overstress) are instead the result of ESD (Electrostatic Discharge) failures due to charged-board events (CBE) [1,2]. A charged printed circuit board assembly stores substantially more charge than a discrete device as its capacitance is larger. A subsequent discharge of the board assembly results in increased current for that event – versus that of the discrete component. Consequently, a device’s CDM (charged device model) rating is lowered when mounted in a printed circuit board (PCB). In an attempt to get a feel for just how much it is lowered, we conducted CDM stress tests on components in discrete form, and again after insertion into larger and larger sized pc boards. We found that the CDM ratings are lowered dramatically!
There is considerable confusion and misinformation in the industry in general surrounding how to protect vulnerable devices from ESD risks. Many people assume that the value of a device’s HBM rating entirely defines its vulnerability to all potential ESD events. It is tempting and convenient to use that voltage rating and apply it to maximum levels that should be allowed on charged insulators, charged printed circuit board assemblies, and other potential CDM failure modes. We hear routinely: “My most sensitive part is 500 volts (HBM), so we insure that our production processes have no charged insulators above that 500 volt level near the ESDS items.” A more relevant vulnerability value would be the device’s CDM rating (not its HBM rating) in that instance, as the potential failure mode here is the device becoming charged by the nearby insulator –
and subsequently discharging upon contact with a conductor such as a person, machine, etc. HBM ratings are easier to obtain from the manufacturers. CDM ratings are typically far less available, and many users end up having to perform CDM testing themselves when they have the absolute need to know.
It is quite difficult (if not impossible) to predict a device’s CDM rating by knowing its HBM rating. For example, we have observed devices with identical 500 volt HBM ratings – and their respective CDM ratings were 150 volts in one case and >2,000 volts in the other. Regardless, developing ESD controls for CDM failure modes is much better served when the CDM rating is known and utilized in the analysis. To make the confusion level even worse, as our experiments indicate here, a device’s CDM rating changes dramatically as it is inserted into larger and larger PCBs.
Hence, the CDM rating for a device should be adjusted to account for the increased capacitance (increased storage capability) of the printed circuit board it is inserted into. We have attempted here to provide a rudimentary start in that effort.
Test Set-Up and Results
In the experiments conducted here, we desired to determine the increased vulnerability to a component when connected to the larger mass of a printed circuit board assembly. The determination of CDM ratings on devices are accomplished typically when the device is in component form. If one end of the device is then connected to a larger mass (let’s say the ground plane in a printed circuit board) – and this entire structure is now charged – a lower voltage charging mechanism is now able to produce the same current during a discharge as when the device was in component form. This means that the device’s CDM rating can be actually lowered when mounted into a printed circuit board. We set about to conduct studies where the “new” lower device rating could be predicted based on the size of the printed circuit board.
We used a two-leaded ESD sensitive device that was vulnerable to 3,500 volts CDM. An ETS Model 910 Charged Device Tester was used to conduct the CDM stress testing (to ESDA industry standards). In this case (see Figure 1), only the charge stored on one lead travels through the ESDS device when the grounding mechanism causes the discharge.
We then conducted the CDM testing with various sized printed circuit board ground planes attached to one side of the device – to simulate a component “sinking” the entire charged pc board ground plane during a discharge, as shown in Figure 2.
In this case, all the stored energy on now both the lead and the ground plane travels through the device upon the grounding mechanism. (We selected a typical PCB ground plane material (.0014” thickness) and cut it into the desired sizes.) Five devices were tested for each size printed circuit board ground plane size listed in Table 1. The determined new CDM ratings summarized are simple mathematical averages of the 5 tested samples for each size board. The results are tabulated in Table 1.
|PCB Size (inches)||CDM Rating||% Reduction||Multiplying Factor|
|Device only (no PCB)||3500 volts||—–||—–|
|4 x 4”||2200||37 %||(.63)|
|6 x 6”||1800||49 %||(.51)|
|8 x 8”||1500||57 %||(.43)|
|10 x 10”||1300||63 %||(.37)|
|12 x 12”||900||74 %||(.26)|
Reviewing the 12” by 12” printed circuit board results (highlighted in gray in Table 1 as an example), the data reflects the following:
- The 3500 volt CDM rating on the component fell to 900 volts when attached to a 12 x 12 inch printed circuit board ground plane.
- That is a 74% reduction in its CDM rating.
- The “Multiplying Factor” in the last column (.26 in this case) is what we multiply the “component CDM rating” in order to calculate its new CBM rating in the 12” x 12” board (to first order). So, a 3.5 Kv CDM component rating times (.26) = 900 volts CBM rating in a 12” x 12” board.
Taking the liberty to play loosely with these numbers, if these percentages and multiplying factors are similar for all devices (not proven yet, but certainly possible), it means that a component – with a fairly robust CDM rating of 950 volts – when inserted into a 12” x 12” PCB – now has a rating of (.26) x (950 volts) = 247 volts.
If a user’s most sensitive device (225v CDM) is placed into an 8” x 8” board, its new CDM rating (actually its CBM rating) would be (225v) x (.43) = 97 volts – which is under 100 volt sensitivity. S20.20, the universally accepted ESD control specification, does not apply to devices more sensitive than 100 volts! If that same device was placed into a 12” x 12” board, its new CBM rating would be 225v x (.26) = 59 volts… and could not safely be handled with the existing controls currently at many facilities. 
Food For Thought
We present this rudimentary information to begin to raise awareness to the issue of devices becoming more and more vulnerable in larger and larger PCBs. We encourage the ESD community to perform testing of this kind, perhaps eventually leading to better standards as a result. There are many unanswered questions that result from this initial experiment (and we caution the reader from drawing too many conclusions from this first cursory set of tests). One question for sure is: Do the multiplying factors given in the table here hold true for all devices – regardless of their basic component CDM rating? Do the results vary with device geometries? Much more work needs to be accomplished, but we feel the method of connecting PCB ground planes of various sizes (as we described herein) to determine CBM ratings, has the potential to become a useful tool.
- G.T. Dangelmayer, Terry L. Welsher, and Andrew Olney “EOS Versus ESD Misdiagnosis: Charged-Board Events Are a Growing Industry Concern,” Medical Electronics Manufacturing, Fall 2009.
- Andrew Olney et al, “Real-World Charged-Board Model ESD Failures,” EOS/ESD Symposium Proceedings, 2003: 34.
- R.J. Peirce, “ESD Control for Class 0 ESDS Devices,” Circuits Assembly, April 2008.
Jim Colnar is a Principal Engineer and the ESD Program Coordinator at General Dynamics Advanced Information Systems (www.gd-ais.com).
John Trotman is the Quality Manager and ESD Management Champion at General Dynamics Advanced Information Systems (www.gd-ais.com).
Roger J. Peirce is the Director of Technical Services for Simco, an ITW Company (firstname.lastname@example.org).