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Sheela Verwoerd

Sheela Verwoerd was born in Pondicherry, India on September 12, 1977. She received her M.Sc in Applied Physics in 2000 at the Indian Institute of Technology, Madras, India. She then moved to the Netherlands, where she did her PhD on “Full Chip Modeling of ICs under CDM stress” in the University of Twente in Enschede. She worked as ESD Assurance Engineer at Philips Semiconductors for a couple of years. After a brief gap of 10 years, she joined NXP Semiconductors as Principal ESD/LU test Engineer focused on ESD/LU qualification of ICs.

From This Author

Can Mechanical Movements on FI‑CDM Tester Cause Additional Zap During CDM Stress?

Secondary discharges during Field-Induced CDM testing aren't just measurement anomalies—they're real stress events caused by mechanical bouncing of the pogo pin. This groundbreaking investigation reveals how contact vibrations trigger unintended zaps with opposite polarity, provides electrical proof of the mechanism, and offers practical solutions to prevent this hidden reliability threat.

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