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Greg O’Sullivan

Greg O’Sullivan received his B.S.E.E. degree from Seattle University in 1994. His career has focused on various IC device testing roles. While with Micron Semiconductor Inc. Greg has worked in the Burn-in Test, Module Test, and Global Quality engineering groups. For the last 16 years he has focused on ESD and Latchup testing as the package test lab engineer and manager. He achieved iNARTE Certified ESD Engineer and ESDA Certified ESD Program Manager (2014) certifications and works on ESD yield issues, and overall improvement efforts for Micron’s ESD factory controls program. He is a founding member of the Micron ESD Steering Committee, and is heavily involved with AEC, ESDA and JEDEC ESD and Latch-up industry working groups. He has authored and co-authored several papers on ESD related topics.

From This Author

The Impact on ESD Risk of AI on Silicon Fabrication and the Implications of Increasing Memory Stacks

This column explores the significant impact of artificial intelligence on advancements in silicon fabrication, focusing on the development of high bandwidth memory (HBM) and associated die-to-die(D2D) electrostatic discharge (ESD) protection challenges.

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