EOS/ESD Association, Inc.

Founded in 1982, EOS/ESD Association, Inc. is a not for profit, professional organization, dedicated to education and furthering the technology Electrostatic Discharge (ESD) control and prevention. EOS/ESD Association, Inc. sponsors educational programs, develops ESD control and measurement standards, holds international technical symposiums, workshops, tutorials, and foster the exchange of technical information among its members and others.

https://www.esda.org

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Commercial Versus Automotive ESD Integrated Circuit Qualification, Part 1

Integrated circuits intended for automotive applications have higher electrostatic discharge (ESD) qualification requirements than those intended for commercial and consumer electronics.

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Industry Council’s Latch‑up Survey

This article provides a high-level overview of the Industry Council paper “Survey on Latch‑up Testing Practices and Recommendations for Improvements,” which describes the full analysis of the collected responses and lays a path for potential adaptations needed to accommodate its use in future technologies and applications.

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Challenges of Designing System-Level ESD Protection at the IC-Level

There is often confusion about the interaction between IC-level component ESD protection and the appropriately required system-level ESD protection strategy.

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Latch-up Electronic Design Automation Checks

This article introduces typical latch-up verification techniques to detect and prevent latch-up. These techniques rely on electronic design automation (EDA) tools to deliver the coverage necessary to identify and eliminate latch-up risks.

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ESD in Joe’s Garage

When handling ESD-sensitive components, we must protect them from ESD damage.

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Charged Device Model

Low Voltage Charged Device Model (CDM) Testing at a Crossroads

Most ESD experts consider CDM testing to be the most critical ESD qualification test for modern integrated circuits. ESD control engineers need to know the charged device ESD robustness of all components passing through their manufacturing line. CDM measurements provide that knowledge.

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Indium-gallium-zinc-oxide (IGZO) Thin-film-transistors (TFT) and ESD

The thin-film transistor (TFT) became commercially available slightly more than 30 years ago in the form of a switch for the Liquid Crystal Display.

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Characterization for ESD Design, the TLP Zoo: Part 2

This is the second of a two-part series on transmission line pulse (TLP) testing.

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Characterization for ESD Design, the TLP Zoo: Part 1

Author’s Note: This is the first of a two-part series on the TLP Zoo,...

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What Are External Latch-up and Internal Latch-up?

Overall, latch-up prevention is one of the most important tasks for both foundries and IC designers. Based on the chip design scheme, designers should select proper solutions to eliminate the ILU and ELU risks in chip design, referencing the foundry guidelines and latch-up silicon data to ensure minimal latch-up risks for the product.

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