Scott Mee

Scott Mee is a co-founder and owner at E3 Compliance which specializes in EMC & SIPI design, simulation, pre-compliance testing and diagnostics. He has published and presented numerous articles and papers on EMC. He is an iNARTE certified EMC Engineer and Master EMC Design Engineer. Scott participates in the industrial collaboration with GVSU at the EMC Center.

From This Author

EMC Concepts Explained

Plane Wave Shielding: Impact of the Conducting Shield on the Electric and Magnetic Fields

Why does a solid metal enclosure block an incoming wave almost completely, yet still let a sliver of energy through? This installment of EMC Concepts Explained walks through the reflection and transmission math at both shield interfaces, showing exactly why thickness and conductivity make all the difference.

EMC Concepts Explained

Shielding Effectiveness: The Impact of Loss Tangent on the Reflection and Absorption Losses

Before you can calculate shielding effectiveness, you need to know whether your material qualifies as a good conductor — and that's where loss tangent comes in. This deep dive connects the math to the physics, from plane wave propagation to practical near- and far-field shielding formulas.

EMC Concepts Explained

Impact of PCB Via and Trace Geometry on the Effectiveness of Decoupling Capacitors, Part 3

Via placement and trace geometry significantly affect decoupling capacitor performance. This final installment of a three-part series presents conducted emissions measurements across six PCB via topologies, revealing how distance from the power-ground plane pair and via spacing impact EMC results.

EMC Concepts Explained

Impact of PCB Via and Trace Geometry on the Effectiveness of Decoupling Capacitors, Part 2

Conducted emissions testing on custom PCBs shows how moving a decoupling capacitor farther from an IC can increase emissions across multiple frequency bands. Using CISPR 25 methods, this study compares capacitor placements and via topologies to reveal how distance and inductance shape PDN behavior.

EMC Concepts Explained

Impact of PCB Via and Trace Geometry on the Effectiveness of Decoupling Capacitors, Part 1

Explore how PCB via and trace geometry influence the real‑world effectiveness of decoupling capacitors. This first article in the series defines six board variants, capacitor placement strategies, and PCB topologies, setting the stage for upcoming RF emission results based on CISPR 25 testing.

- From Our Sponsors -

EMC Concepts Explained

EMC Education

Discover how a unique collaboration between Grand Valley State University and E3 Compliance creates exceptional learning opportunities in EMC and high-speed electronics. Learn how students gain hands-on industry experience through co-op programs, research projects, and real-world testing, preparing them for successful careers in electromagnetic compatibility.

Columns

12 3 Page 1 of 3

Digital Sponsors

Become a Sponsor

Scott Mee

From This Author

Digital Sponsors

What's New

Pre-Compliance Testing for Radiated Emissions, Part 2: Making the Measurement

FCC Takes Action Against Unlawful Drones

FDA Releases Latest Data 510(k) Third-Party Perform

Materials Matter: Choosing the Right EMI/RFI Shielding for Compliance

Brazil Publishes Regulations on Hazardous Materials in Electronics