Brett Carn initially joined Intel Corporation in 1999 and was a Sr. Principal Engineer in the Corporate Quality Network. He actively worked in the field of device-level ESD at Intel. In that role, Brett chaired the Intel ESD JET, overseeing component-level ESD & Latch-up testing across all Intel sites worldwide, defining all internal test specifications, reviewing Intel’s manufacturing and material controls, overseeing/defining the ESD target levels for all Intel products worldwide, and leading post-silicon ESD debug on many products. Brett was also actively involved with addressing EOS at Intel. Before joining Intel, he worked for Lattice Semiconductor for 13 years. As the Reliability Manager for Lattice, Brett started working on ESD in the early 1990s. After 38 years in the semiconductor industry, Brett retired in August 2024. Since 2007, Brett has been a member of the Industry Council on ESD Target Levels, has helped author several whitepapers, and has been the lead editor on the last eight white papers. After retiring, Brett remains an active member of the EOS/ESD Association, Inc. (ESDA) and has served as an elected/appointed director on the ESDA Board of Directors (BoD) since 2014. In his role with the BoD, Brett served as Standards Business Unit Manager for 6 years and is currently the Standards Strategic Manager, overseeing all aspects of standards for the ESDA. Brett is the chair of the Technical and Advisory Support Committee (TAS), leads the ESDA Online Training, is a member of the Standards Committee, and is a member of many standards working groups (WGs) within the ESDA, including the Human Body Model (HBM) and Charged Device Model (CDM) WGs. In 2019, Brett received the Outstanding Paper Award at the EOS/ESD Symposium. In 2023, Brett received the highest honor that is given to anyone in the ESD community when the ESD Association membership presented him with the Outstanding Contributions Award.
