Robert Ashton is the Chief Scientist at Minotaur Labs. He received his BS and PhD degrees in Physics from the University of Rhode Island. After Post-Doctoral positions at Rutgers University and Ohio State University he joined AT&T Bell Laboratories in the field of integrated circuit technology development. He stayed with Bell Laboratories, and its spinoffs Lucent Technologies and Agere Systems for 23 year where he became involved with on chip ESD protection. After leaving Agere Systems he became Director of Technology of White Mountain Labs, an ESD and latch-up test house. He then spent 10 years with ON Semiconductor in their discrete products division, providing and managing application engineering support for transient voltage suppression products. He has published numerous articles on ESD testing of integrated circuits, test structure use in integrated circuits, and CMOS technology development. He has also presented tutorials on ESD, latch-up, and transmission line pulse testing at IEEE and ESDA conferences. Robert is an active member of ESDA working groups for device testing standards and the JEDEC latch-up working group. He has been a regular member of the EOS/ESD Symposium technical program committee. Robert served on the ESDA board of directors from 2011 to 2013 and was business unit manager for advanced topics in 2012 and 2013. He is currently serving as co-chair of the human metal model (HMM) working group.
As long as integrated circuits migrate to new technologies and advances are made in packaging more integrated circuit dies into a single package, the CDM challenge is going to get harder.
This is Part 2 of an article describing the difference between the electrostatic discharge (ESD) qualification requirements for automotive and standard commercial integrated circuits.
Integrated circuits intended for automotive applications have higher electrostatic discharge (ESD) qualification requirements than those intended for commercial and consumer electronics.
Most ESD experts consider CDM testing to be the most critical ESD qualification test for modern integrated circuits. ESD control engineers need to know the charged device ESD robustness of all components passing through their manufacturing line. CDM measurements provide that knowledge.
Author’s Note: This is the first of a two-part series on the TLP Zoo, the variety of transmission line pulse (TLP) systems used in the characterization of electrical components and system of ESD robustness. In ... Read More...