Should the reference (i.e., ground) plane be split into two separate sections and a ferrite bead installed between them to prevent unwanted radio frequency emissions? Let’s examine why this practice is not a good idea and should be avoided at all costs.

Splitting the Reference Plane

The 0V reference plane (sometimes mistakenly called a ground plane) is an essential element in electromagnetic compatibility (EMC) design of a PCB. Its proper design is more important than almost anything else that can be done to the board to achieve EMC compliance. DO NOT split the reference plane unless you know what you are doing (and maybe not even then).

Although it should be kept as one congruent element to achieve EMC compliance, beware that you will encounter EMC design guidelines and application notes for integrated circuits which still describe the old practice of splitting the reference plane between analog and digital sections, and then bridging them with a ferrite bead, as the best thing to do to achieve EMC compliance.

Don’t let misguided application notes persuade you to split the reference plane into two. In contrast to the “old” guidelines, over the past several years, many electronic designers find that keeping the 0V reference plan intact will achieve better signal quality and EMC performance. Only under careful consideration should the 0V reference plane ever be split (i.e., specialty cases with low-frequency analog circuits).

In most cases, splitting the 0V reference plane and bridging the split with a ferrite is unnecessary. Splitting the reference plane, in fact, promotes bad routing practices because routing across the break alongside the ferrite establishes a significant loop antenna that not only emits radio frequency noise but also receives it nearly as well.

Adding a Capacitor

But, “What if I add a capacitor in addition to and parallel with the ferrite?”

Unfortunately, this circuit combination of ferrite and capacitor forms an LC resonant tank circuit that will ring intensely, making matters much worse! The spectrum of any digital signal found on the board will excite the LC resonance in that circuit after it crosses the gap across the reference plane. Even if an actual physical capacitor is not installed, stray capacitances on the board and within the system allow an LC resonant circuit to form with the ferrite causing electromagnetic interference.

What to Do Instead of Splitting Reference Planes

  1. Ignore application notes that want you to provide isolation with split reference plans.
  2. Practice proper layout and routing practices. This is the safest approach to provide separation and achieve EMC compliance for your design.

References and Further Reading

  1. Armstrong, K., EMC for Printed Circuit Boards, Armstrong/Nutwood UK, 2010.
  2. How to Use a Ferrite Bead in Your Design to Reduce EMI, October 27, 2021.

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