PC Board EMI
If properly done, PC board (PCB) design control techniques can be the most cost effective means of resolving EMI issues.
The techniques involve:
- board stack-up
- use of isolating lines
- board level shields
Other techniques involving additional component costs include high frequency grounding of the board and filtering techniques. It is important to mention that if these techniques are designed in at the initial stage, there will be minimal impact to schedule and cost. Correct techniques begin with component placement. Critical circuits (i.e. clock circuits, clock driver, etc.) and functions should be grouped together, providing the shortest trace lengths between components.
Engineers should consider the use of multi-layer boards, having many ground planes, designing high-speed traces (such as transmission lines), and employing proper and adequate filtering and decoupling components. In addition, designers should add placements for filtering components, but place jumpers or “zero-ohm resistors” to hold them in place and only add the real components if required to by the test. Early board prototype testing can produce useful insight into potential problem areas. Board areas with high radiation and the measuring of interconnect cable noise currents are indicators of potential system radiation sources.
Both radiated noise and conducted noise can be a problem in these systems. For conducted noise issues, the use of ferrite chokes and proper signal line layout can prevent a host of issues when considered in the design phase rather than later on.
It is a well-known fact in the EMC community that the closer you are to the source of an EMI problem, the more efficient and less expensive it is to fix. One cannot get any closer than by using a board level shield (BLS). Having stated that, it is important to mention that there is no substitute for proper circuit design and layout.
Looking at a basic formula for RF emissions:
E = 1.316 AIF2/(DS)
E = microvolts / meter
A = radiating loop area in cm2
I = current in amps
F = frequency in MHz
D = measurement distance in meters
S = shielding effectiveness ratio
Let’s examine the formula and break it down to better understand it. First we will eliminate 1.316 as it is a constant. D is the measurement distance specified by the standard to which you are testing. D can also represent the distance from the device to an object with which it may interfere. In any case, these are factors beyond the control of the device designer. If we further examine this formula, we see that emissions (E) increase linearly with current and loop area but increases exponentially with frequency. We see that it is extremely important to keep loop area as small as possible, especially for high current and/or high frequency circuits. We have seen over many decades that the most common cause of failure is caused by excessive loop area. Whether the excessive loop areas are caused by poor layout or by the offensive signal coupling into other circuits with large loop areas, the result is the same; failure to meet your mandatory emissions requirements. PCB layout software that does not include EMC software will generally not consider loop area. Therefore, the designer must take control and lay out high current and high frequency circuits manually to be sure to minimize loop area. Of course, if you cover the entire loop area with a shield, there is no loop area exposed and that value goes to zero. Again, keeping the loop area as small as possible allows for the smallest possible shield.
Going back to the formula we see that one term has not been addressed, S. S is for shielding. Once the designer has chosen the circuit components, which will determine the frequency and current, and has reduced the loop area to the smallest possible geometry, if the device does not meet its requirements, there is only one thing left to do. Shielding! Looking tot the opening statement of the article, the closer this shielding design is to the problem, the better. Allowing for proper BLS mounting must be done at the PCB design stage. It is essentially impossible to properly mount a BLS after the board has been laid out.
Consider this; the BLS supplier only provides 5 sides of the required 6-sided Faraday cage you are attempting to build. It is up to the PCB designer to build into the PCB the sixth side, usually an imbedded ground plane. The designer must also provide properly spaced mounting pads, as well as determine if through-hole or surface mounted methods will be used. Although BLS parts are needed to manage EMI requirements for both immunity (for product performance) and regulatory needs (FCC, EU etc.), the board shield design is usually not the only factor in EMI performance. As mentioned, the sixth side of the Faraday cage is the PCB ground plane, and the PCB design itself has much influence on overall EMI performance.
Remember that these same basic design principles hold true for susceptibility. Therefore, BLS works equally well for emissions and/or susceptibility.
Board level shields are generally categorized into four basic types:
- one-piece with removable sections
A one-piece BLS is typically a stamped and formed sheet metal can, often produced on high-speed presses. These are usually the least expensive for high-volume production. A two-piece BLS is also stamped, with individual fences and covers. The two-piece BLS can be provided assembled, or as individual components. These are often used where access to PCB components is necessary for inspection, testing or rework. One-piece with removable sections is a one-piece BLS with removable areas that are scored for easy removal and access to components for adjustment or repair. A separate replacement cover is required. A drawn BLS is a one-piece BLS that uses drawn stamping technology to produce a BLS with no slits or apertures at the corners.
Figure 1: Section through one of the perimeter via holes
(Courtesy of Eur Ing Keith Armstrong C.Eng MIEE MIEEE, Cherry Clough Consultants)
Figure 2: Courtesy of Eur Ing Keith Armstrong C.Eng MIEE MIEEE, Cherry Clough Consultants
As more fine pitch components are utilized on a PCB, thinner solder paste thicknesses are required to prevent shorts or bridges. This has translated into better flatness requirements for SMT board level shields. Current flatness requirements are typically 0.10mm to 0.05mm. Drawn shields and rigid corner technology (US Patent 7,488,902 B2 Figure 3) can improve flatness capabilities by acting as a stiffener for the whole shield. Additionally, where acceptable, through hole features can be utilized to ensure a good mate exists between the BLS and PCB during assembly and reflow. Existing products and solutions are eye-of-needle pins and other compliant pins (Figure 4).
Figure 3: Rigid corner technology (US Pat 7,488,902 B2)
Figure 4: Eye-of-needle/compliant pin
A newly available product is the through-hole lock pin (Figure 5), which allows for precise and repeatable fixturing of the BLS (frame or single piece) to the PCB for the subsequent reflow operation (conformal to the PCB).
Figure 5: Through-hole lock pin
Post Reflow Inspection/Testing
In the PCB manufacturing process, there are often post reflow inspection or testing requirements that need as much open access to the PCB components as possible. For SMT BLS frames, the pickup bridge can be in the way of this inspection or testing requirement and must be removed. Post installation/reflow access to PCB components under the BLS pickup bridge is a common requirement. Manual removal of the pickup bridge by cutting or bending has been a necessary, labor-intensive step. A new product feature is the ReMovl pickup bridge (Figure 6). It is a pre-cut bridge for easy toolless removal or automated removal (Figure 7).
Figure 6: ReMovl pickup bridge BLS frame
Figure 7: Bridge removed
For some applications, it is important to have the capability to rework areas on the PCB covered by the BLS. This may be part of the initial manufacturing process or later work in the field. Single piece BLS with simple rework capability is required. One solution is the EZ Peel BLS with scored lid (Figure 8). However, separate replacement covers are required, and this can lead to inconsistent performance on removal and replacement of the scored section.
Figure 8: EZ Peel BLS
An alternative to this solution is the ReCovr BLS, a good alternative to the EZ Peel solution since it can reuse the original cover (Figures 9 and 10). It has the advantages of a two-piece BLS at a cost comparable to a one-piece BLS. Recent enhancements to the latching features of this design improve the cover retention force both as delivered, and after removal and replacement. This feature allows for applications where shock and vibration may be encountered.
Figure 9: ReCovr with lid removed
Figure 10: ReCovr with lid in place
Long-term Performance and Reliability
While many BLS applications have short product lifecycles, there are also many longer-term applications in automotive, industrial automation and military programs which require sustained performance over many years. In these cases, both corrosion concerns and tin whiskering must be considered in the base material and plating choices.
As relative PCB space continues to shrink and power/heat generation per unit area grows, more multi-functional BLS and thermal products will be needed. One potential solution exists with BLS and integrated thermal pads. If the frame assembly to PCB includes a pickup bridge for automated placement, this bridge needs to be removed to allow for contact of thermal interface material to the PCB component. The Removl pickup bridge is an ideal option for this application. The ReMovl pickup bridge facilitates the manufacturing process by simplifying the removal of the pickup bridge.
Customer Requirements/Industry Drivers
Today, based on current customer application needs for BLS products, there are even more choices and product features available. These technology innovations were driven by the application needs across multiple industries. These additional design choices are summarized in Figure 11.
Figure 11 (click image for larger version)
As you now see, board level shields are not just five-sided metal boxes anymore. Today’s advanced BLS designs provide solutions for many manufacturing, performance and rework requirements. Understanding all the options and utilizing the BLS design selection guide can help lead you to the most efficient and cost effective solution. In addition to the guide, remember that a trained field application engineer may still be the best choice for proper BLS design and feature selection.
EMC Technical Support Engineer and NARTE Certified EMC Engineer
has been with Laird Technologies for 29 years. He is a specialist in RF shielded enclosures and has been responsible for the design and/or measurement and quality control of hundreds of large-scale shielded enclosures, as well as a number of shielded equipment cabinets and housings. He was instrumental in the design and construction of Laird Technologies’ state-of-the-art World Compliance Centers and has authored many articles on EMC requirements for medical devices, mutual recognition agreements and guidelines to meet the essential requirements if the EU EMC Directive. He has also authored several seminars, presented worldwide, on the EU EMC Directive, international compliance, and designing for EMC and EMC requirements for medical devices. He holds the patent for the invention of heat-treated beryllium-copper knitted wire mesh gasket. Other patents are pending.
Director of Engineering and Product Development for EMI Metals
has been with Laird Technologies for 15 years. He holds a B.S. in Mechanical Engineering from Rennselaer Polytechnic Institute and has previously served as an officer in the U.S Navy. Within Laird Technologies, he has held various roles in tooling, engineering, and product design and has been instrumental in establishing the global resources for Laird Technologies EMI Metals capabilities. He holds several patents related to board level shield products with additional patents pending.