System-product Response to Electrostatic Discharge Events

The myth: A system-product that successfully complies with the criteria of ESD (IEC-based) Standards will not exhibit personnel ESD susceptibility when used in actual installations.

The reality: The ESD “simulation” of typical “standards” only represents a portion of the ESD continuum that can be exhibited in nature.

Electrostatic Discharge (ESD) events from personnel in nature (as opposed to simulations stipulated in “standards”) exhibit a great variety of waveforms and peak amplitudes of current that are far broader in spectral impact than those required in “standards”. For example, at initialization ESD voltages (the static level prior to displacement through discharge) below approximately 5kV, research has shown that rise times can often be found in the 200 to 500 picosecond range, with peak currents in the tens of amperes. As initialization voltages increase, the ionization path at the discharge point increases and the rise times can slow down into the range of approximately 1 to 20 nanoseconds. However, peak currents at these slower rise times can still be found in the range of tens of amperes for conditions where the ESD comes from a metal object (e.g. a key). (In nature, currents from fingertips are much less by an approximate factor of 5.)

Extending the continuum of ESD events to other conditions, such as ESD from mobile-furnishings (e.g. desk chair structures that can impact “horizontal” planes), brings an even greater increase in peak currents (approaching 100 amperes from source impedance of approximately 75 ohms) and increased radiated field intensities (from the displacement of current in the structure). The extraordinary current peaks from mobile furnishings pose an increased threat to system performance due simply to current stress. The high current from ESD at, for example, 15 kV from a metal push-cart can produce time-domain radiated field intensities from the cart (which will become a transmitting antenna with the ESD current displacement) in the range of approximately 1,600 Volts/meter!

In practice, ESD impulses are spectral excitations across a broad frequency span. The efficiency of spectral excitation is established by the rise time, while the intensity is established by the current delivered to the system-product. At low ESD voltages where the rise times tend to exhibit a spectral distribution well over 1 GHz, system-products may be more responsive (susceptible) due to the “match” of the ESD spectra to fast circuit devices. At higher ESD voltages where the rise times are much slower, the system-products are less susceptible. Spectra from longer ESD rise times can influence responses in interface cables (which can support the lower-spectra of current) where the spectra from faster rise times can couple through local apertures in shields or circuit devices to cause system response. Considered in combination, it is possible for a system to exhibit ESD responses to lower ESD voltages (e.g. 2 to 4 kV) and not higher voltages, mid-ESD range voltages (e.g. 5 to 8 kV) and not lower or higher levels (sometimes called “the response window effect”), or only higher (> 10 kV) levels. This assumes that, in performing such evaluations on products, the ESD Test Generator used is capable of producing ESD waveforms that are variable at different voltages as they are found in nature. For reporting, the effect noted here can be termed the “spectral-bandwidth-dependency”, where the spectral bandwidth is defined by the ESD amplitude in nature. The description also exposes another “myth”; that testing a system-product at high ESD amplitudes will assure immunity at lower amplitudes.

Given these realities, combined with the limitations of “standard” test methods, the typical immunity tests may be viewed only as “tentative” in describing the ESD performance of system-products. favicon

ICM wishes to acknowledge the first appearance of W. Michael King’s “Myth vs. Reality” series with NTS – Silicon Valley.


author_king-wmichael W. Michael King
is a systems design advisor who has been active in the development of over 1,000 system-product designs in a 50 year career. He serves an international client base as an independent design advisor. Many terms used for PC Board Layout, such as the “3-W Rule”, the “V-plane Undercut Rule”, and “ground stitching nulls”, were all originated by himself. His full biography may be seen through his web site:, he is the author of EMCT: High Speed Design Tutorial (ISBN 0-7381-3340-X) which is the source of some of the graphics used in this presentation. EMCT is available through Elliott Laboratories/NTS, co-branded with the IEEE Standards Information Network.