Evaluation of PCB Design Options on Analog Signal RF Immunity using a Multilayer PCB

Part 2: Radiated Immunity Testing

This is the second of three articles devoted to the design, test, and EMC immunity evaluation of multilayer PCBs containing analog circuitry. The first article presented a top-level block diagram description of the design problem under research [1,2]. This article is devoted to the RF immunity testing according to the ISO11452-11 Radiated Immunity Reverberation Method standard from 400MHz – 1GHz, up to 100V/m. As a reminder, two analog measurements are present on the PCB. The first analog measurement captures analog temperature values from a Negative Temperature Coefficient (NTC) thermocouple at the end of a short harness. The second analog measurement captures the analog voltage of 12 volts connected at the banana jack terminals of the PCB. Both sets of values are processed by the microcontroller and reported to the test engineer outside the chamber via Universal Asynchronous Receiver Transmitter (UART) and fiber optic communications for isolation. However, for this article, only analog temperature measurements are presented and discussed.

1. PCB Variants and Tests Configurations

In this study, there are seven design variants that all contain a similar schematic but implement different PCB layout techniques (see [1] for the details). The design variants are described in
Table 1.

Variant Analog Trace Routing Style Analog Trace Routing Layer Grounding Method Ground Split Geometry Ground Split Layers
1 Differential Microstrip on top layer Single Ground Reference (GND) N/A N/A
2 Single Ended
3 Differential Embedded on layer 3
4 Single Ended
5 Single Ended Microstrip on top layer Split Ground Reference
(AGND and GND)
AGND under analog circuitry, adjacent to GND* All layers
6 AGND under analog traces, surrounded by GND* Layer 2 only
7 1-3-1-3-1-3-1-3-1

Table 1: Design variants

Table 2 shows the test configurations used during the testing of the selected variants.

Configuration A Configuration B Configuration C
  • Non-conductive enclosure
  • No filters on analog signal traces
  • All 7 variants
  • Conductive enclosure
  • 4  non-conductive standoffs
  • Non-conductive ground ring gaskets (top & bottom)
  • No filters on analog signal traces
  • 3 worst performing variants, (1,5,6)
  • Conductive enclosure
  • 4 conductive standoffs
  • Conductive ground ring gaskets (top & bottom)
  • Selective filtering on analog signal traces
  • Worst performing variant (1)

Table 2: Description of test configurations

The details of the measurement setup are shown in Figure 1.

Figure 1: ISO11452-11 measurement setup

All tests were run in continuous wave (CW) transmission (e.g. no modulations utilized).

2. Immunity Testing Results – Configuration A

Variant 1 and Variant 2 test results are shown in Figure 2.

Figure 2: Configuration A: Variant 1 vs. Variant 2

Observations: Variant 1 tested in Configuration A exhibited anomalies (with the exception of 600 to 680MHz) with the analog temperature readings. Variant 2 tested in Configuration A exhibited anomalies (with the exception of 640 to 650MHz and 700 to 720MHz) with the analog temperature readings. Compared to Variant 1, Variant 2 performed slightly better, especially below 600MHz. This demonstrated that differential routing did not provide any significant benefit.

Next, Variant 3 was tested, and the results were compared to those of Variant 1. The comparison is shown in Figure 3.

Figure 3: Configuration A: Variant 1 vs. Variant 3

Observations: Compared to Variant 1, Variant 3 performed slightly worse throughout the whole range. This demonstrated that burying differentially routed traces did not provide a noticeable benefit.

Next, Variant 4 was tested, and the results were compared to those of Variant 2. The comparison is shown in Figure 4.

Figure 4: Configuration A: Variant 2 vs. Variant 4

Observations: Variant 4 performed very similarly to Variant 2, with no significant differences. This demonstrated that burying the traces in a single-ended mode did not provide any noticeable benefit.

Next, Variant 5 was tested, and the results were compared to those of Variant 2. The comparison is shown in Figure 5.

Figure 5: Configuration A: Variant 2 vs. Variant 5

Observations: Variant 5 showed slightly worse performance than Variant 2 across the entire spectrum. This demonstrated that splitting the grounds, ground (GND) and analog ground (AGND), has a negative impact on the performance.

Next, Variant 6 was tested, and the results were compared to those of Variant 5. The comparison is shown in Figure 6.

Figure 6: Configuration A: Variant 5 vs. Variant 6

Observations: Variant 6 performed slightly better than Variant 5 except for the region around 460MHz. This could indicate that having AGND isolated on Layer 3 has a positive impact on the performance in a split ground topology. 

Next, Variant 7 was tested, and the results were compared to those of Variant 6. The comparison is shown in Figure 7.

Figure 7: Configuration A: Variant 6 vs. Variant 7

Observations: Jumping the analog traces from Layer 1 to 3 (Variant 7) introduces regions where one variant outperforms the other. Variant 7 shows better immunity in the lower frequency range, while Variant 6 is better in the mid-frequency range. Our experience has shown that jumping layers should be avoided as it introduces anomalies in an unpredicTable frequency range.

3. Immunity Testing Results – Configuration B

The three variants which exhibited the weakest RF immunity performance in Configuration A were re-tested in the same frequency range. The weakest RF immunity was exhibited by Variants 1, 5, and 6.

Figure 8 compares the test results for Variant 1, Configuration A vs. B.

Figure 8: Variant 1 – Configuration A vs. B

Observations: Variant 1 in Configuration A generally outperforms Configuration B up to 700MHz. Between 700MHz and 800MHz, Configuration B shows a benefit. Beyond 800MHz, there is no noticeable difference in performance. Based on the data, an ungrounded shielded enclosure provides benefits in a limited frequency range.

Figure 9 compares the test results for Variant 5, Configuration A vs. B.

Figure 9: Variant 5 – Configuration A vs. B

Observations: Variant 5 in Configuration B performed similarly to Configuration A with the exception of 400MHz and 740MHz – 880MHz range. There are inconsistent benefits of Configuration B most likely due to the split ground strategy that doesn’t provide complete shielding from the enclosure.

Figure 10 compares the test results for Variant 6, Configuration A vs. B.

Figure 10: Variant 6 – Configuration A vs. B

Observations: Variant 6 in Configuration B performed similarly to Configuration A with the exception of frequencies around 420MHz and 620MHz – 720MHz range. There are inconsistent benefits of introducing an ungrounded conductive enclosure (Configuration B). In Variant 6, the analog traces are routed on the top layer with PCB GND surround and a separate Analog GND beneath on Layer 2. All other layers are PCB GND. These layout design features make the ungrounded shielded enclosure have less impact on the immunity performance.

4. Immunity Testing Results – Configuration C

Finally, the worst-performing variant from Configuration B (Variant 1) was re-tested in the same frequency range. Figure 11 compares the test results for Variant 1, Configuration A vs. C.

Figure 11: Variant 1 – Configuration A vs. C

Observations: Variant 1 in Configuration C performed dramatically better than Configuration A over a wide band of frequencies from 400MHz to 1000MHz. Improvements were made due to the shielded enclosure, conductive standoffs, conductive gaskets, and selective filtering components on the analog lines. Since Configuration B (shielded enclosure, non-conductive standoffs) didn’t provide as much benefit as Configuration C, the added conductive gaskets, conductive standoffs, and component filtering likely provided the most benefit.

5. Future Work

The next article will discuss the results of the RF conducted immunity testing. 

References

  1. Baatar, B., Costantino, C., Morey, R., Muldowney, C., EMC PCB Design Study, GVSU senior project sponsored by E3 Compliance, LLC.
  2. Adamczyk, B., Mee, S., Baatar, B., “Evaluation of PCB Design Options using a Multilayer PCB – Part 1: Top-Level Description of the Design Problem,” In Compliance Magazine, May 2022.

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