Why is it Important to Measure the Surface Resistance of Materials?
ANSI/ESD STM 11.11-2015 was developed to fulfil a need to measure static dissipative planar materials not provided for by existing ASTM resistivity measurement methods. A static dissipative material, as defined by the ESD Association’s glossary of terms, may have volume or surface resistive characteristics, or both. This procedure is a resistance measurement on the surface of the material and is applied without regard to the sample’s mechanism of conduction. In cases where it is valid to convert resistance to resistivity, the resistivity values are a factor of ten higher than the resistance values obtained by this test method. This standard test method specifies test fixture configuration, environmental conditions, a systems verification procedure and the test voltages. This test method has been proven to be repeatable within one half-order of magnitude through inter-laboratory tests.1
The main sections in this document cover:
- Test equipment
- Sample preparation and conditioning
- Lower resistance range system verification procedure
- Upper resistance range system verification procedure and determination of electrification period
- Testing specimens
- Reporting the surface resistance data
- Conversion to resistivity
This procedure is recommended by EOS/ESD Association, Inc. instead of ASTM D257 for measuring the surface resistance of static dissipative planar materials. A static dissipative material, as defined by ESD ADV1.0, may have volume or surface resistive characteristics, or both. This procedure is a resistance measurement on the surface of the material and is applied without regard to the sample’s mechanism of conduction. This standard test method consists of the following steps:
- Sample preparation and conditioning.
- Setup instrumentation including calibration of electrode assembly.
- Determination of the system’s electrification period.
- Test procedure.
- Documentation and reporting of data.
NOTE: Surface resistance is a direct measurement on a material’s surface. This measurement should not be confused with surface resistivity as previously employed in ASTM D257 references for insulative materials.
This document is an important part of the ESD Program Managers arsenal. Common items used in electrostatic discharge (ESD) protected work areas (EPA) are plastic totes, trays and boxes. In most cases, these are viewed as commodity items with very little thought or engineering put into their acquisition and implementation. However, they can be critical because they are used to protect the devices, circuit cards, and assemblies that are transported within them. Certainly, they must protect the part mechanically, but they must also protect the assemblies electrically.
However, just what does electrical protection include? It is important to understand that current, not voltage, causes ESD damage to electronic devices, circuit boards and assemblies. Selection of handling and packaging materials that may come in contact with electronics must be both homogeneous and able to dissipate charge to adequately limit discharge currents to prevent charged device model (CDM) or charged board events (CBE) related ESD damage. Most users realize that these items must not carry a charge that would result in an electrical field that can induce a voltage into the sensitive electronics that are in close proximity or enclosed within them. To accomplish this, tote boxes and trays are frequently manufactured from static dissipative or conductive materials so that any generated charge on the material is bled to ground when the transportation item is grounded.
In many situations, users believe that “the more conductive the better;” however with the proliferation of devices that are more and more sensitive to CDM as well as to CBE, placing devices and assemblies into a conductive container may produce damaging discharge currents. Experience in countless factories has indicated that over 50 percent of black ESD materials have less than 105 ohms surface resistance measurement (SRM) and, thus, are too conductive for CDM and CBE protection. Further, SRM can be misleading. Tests and manufacturing results discussed below have proven that some static dissipative materials can still produce significant and possibly damaging discharge currents.
As depicted in Figure 1, two primary methods have been employed in the industry to reduce CDM and CBE damage. Both will minimize discharge currents and, thereby, ESD damage. Method One involves lowering electrostatic potentials on ESD sensitive electronics by managing static generating materials and/or neutralization of charge via ionization. This method is commonly included in industry standards, whereas, Method Two is not. However, ionization takes a finite amount of time and complete removal of charge may not be possible for a variety of reasons. This method is problematic for low CDM ESD sensitive devices and charged boards because ionization may not remove enough charge in time allocated to protect extreme senilities.
Method Two involves managing material properties and SRM at the point of contact with ESD-safe electronics to reduce peak discharge currents. This method is highly effective for low CDM ESD sensitive devices and charged boards. It is often more cost effective, more robust and less prone to human error than Method One. However, the material must be homogenous as well as static dissipative to avoid the high discharge currents discussed below. The optimal surface range is 106 to 109 ohms. It is important to note that a discrete resistor does not provide protection from these fast transients. Additionally, re-balancing of the charge by making contact between the ESD-safe device and a conductive item can actually induce damage during the connection.
To obtain STM 11.11, as well as, the entire library of EOS/ESD Association, Inc. standards please visit https://www.esda.org/standards.
References
- ANSI/ESD STM 11.11-2015 Surface Resistance Measurements of Static Dissipative Planar Materials
Ted Dangelmayer is the president of Dangelmayer Associates, LLC and has assembled an ESD consulting team consisting of the foremost authorities in virtually all ESD areas of both product design and manufacturing. He received the “Outstanding Contribution” award and the EOS/ESD Association, Inc. “Founders” award. He was president of EOS/ESD Association, Inc., chairman of the ESDA standards committee, and general chairman of the EOS/ESD Symposium. He has published two editions of his book, ESD Program Management, numerous magazine articles, and technical papers. Ted holds three patents and is iNARTE certified. He is currently president of the Northeast local chapter of EOS/ESD Association, Inc., a member of the ESDA Education Committee, ESDA Marketing Committee, and ESDA Publicity Committee.
Matt Strickland is currently the ESD Program Manager for L3 Telemetry and RF Products in San Diego CA. He has been involved in ESD control since 2009 and in 2011 named as the Chair for the L3 Technologies ESD resource team. He received his ESD Program Manager Certification in 2015. Matt joined the L3 Communications team in 1997 after retiring from 20 years of Naval service. He obtained a Bachelor of Science Degree in Occupational Safety from Columbia Southern University in 2013.
Matt has been a member of the ESD Association since 2009 and is currently a Standards Committee Member, serves on several Standards Sub-committees, serves on the ESD Association education committee with a specific role of course material review. He also is a contributing member of the ESD Symposium operational team. As a certified ESD Program Manager, Matt’s goal is to be able not only to strengthen his local divisions ESD control program, but also to provide guidance and assistance to other divisions within L3 Technologies in the development or strengthening of individual plant ESD controls and processes.
