64-Bit MIPS Architecture Provides Low-Power, High-Throughput Processing

core processor photo

Imagination Technologies (IMG.L) announces that its 64-bit MIPS architecture is at the heart of Cavium’s new low-power OCTEON(R) III SoC processors that target next-generation enterprise, data center and service provider infrastructure.

Cavium’s two new mid-range families join the comprehensive line-up of 64-bit MIPS OCTEON(R) III multi-core processors. The low-power four to 16 core CN72XX and CN73XX SoCs deliver high-performance compute and packet performance, along with powerful networking and virtualization acceleration while meeting the stringent power requirements of compact and resilient networking and security appliances, storage appliances, wireless infrastructure, switches, and integrated routers.

Raghib Hussain, corporate vice president/general manager & CTO at Cavium, says: “Imagination continues to innovate and Cavium has used its architectural license to further enhance our latest processors that are based on the 64-bit MIPS architecture. Cavium’s OCTEON MIPS64-based products, from OCTEON Fusion for small cells to the high-end OCTEON III 48-core CN78XX designs, are gaining traction across a broad range of markets. Now, with these new processors, we’re enabling a new range of efficient solutions that require ultra-high throughput processing within a compact, low-power form factor.”

Tony King-Smith, EVP marketing, Imagination, says: “Cavium’s OCTEON III products are among the most advanced 64-bit multi-core processors for networking, wireless and storage. They are a great example of the power of MIPS, the industry’s most successful and proven 64-bit CPU architecture. As Imagination continues to invest in R&D and ecosystem developments for MIPS, the industry will see its capabilities continue to grow, and see it driving innovative applications in a wide range of markets through licensees like Cavium.”

Cavium played a key role in the requirements and definition of the MIPS virtualization architecture specification, and therefore the hardware virtualization technology in the OCTEON III processors is compatible with the MIPS virtualization architecture. Cavium is among the first MIPS licensees providing silicon that incorporates the MIPS hardware virtualization technology.

MIPS CPUs comprise a comprehensive portfolio of low-power, high-performance microprocessor IP cores and architectures, ranging from solutions for high-end applications processing down to solutions for extremely small, deeply embedded microcontrollers. MIPS CPUs power billions of products around the globe. The 64-bit MIPS architecture is widely deployed in a large number of products, and is supported by a vibrant and growing ecosystem built over more than 20 years.

Photo by Thomás

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